DK-DEV-2AGX125N Altera, DK-DEV-2AGX125N Datasheet - Page 30
DK-DEV-2AGX125N
Manufacturer Part Number
DK-DEV-2AGX125N
Description
KIT DEV ARRIA II GX FPGA 2AGX125
Manufacturer
Altera
Series
Arria II GXr
Type
FPGAr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.DK-DEV-2AGX125N.pdf
(48 pages)
3.DK-DEV-2AGX125N.pdf
(64 pages)
Specifications of DK-DEV-2AGX125N
Contents
Board, Cables, CD, DVD, Power Supply
Silicon Manufacturer
Altera
Core Architecture
FPGA
Core Sub-architecture
Arria
Silicon Core Number
EP2
Silicon Family Name
Arria II GX
Rohs Compliant
Yes
For Use With/related Products
EP2AGX125EF35
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2600
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DK-DEV-2AGX125N
Manufacturer:
Altera
Quantity:
135
Table 1–34. Transceiver Specifications for Arria II GX Devices (Part 2 of 7)
Duty cycle
Peak-to-peak
differential input
voltage
Spread-spectrum
modulating clock
frequency
Spread-spectrum
downspread
On-chip
termination
resistors
V
(AC coupled)
V
(DC coupled)
Transmitter
REFCLK Phase
Noise
R
ICM
ICM
ref
Description
Symbol/
PCIe
PCIe
HCSL I/O
standard for
PCIe
reference
clock
Condition
100 KHz
1 MHz
10 KHz
100 Hz
10 Hz
1 KHz
—
—
—
—
—
Min
200
250
45
30
—
—
—
—
—
—
—
—
—
1100 ± 5%
–0.5%
± 1%
2000
I3
0 to
100
Typ
—
—
—
—
—
—
—
—
—
—
2000
-110
-120
-120
-130
Max
550
-50
-80
55
33
—
—
—
Min
250
200
45
30
—
—
—
—
—
—
—
—
—
(Note 1)
1100 ± 5%
–0.5%
± 1%
2000
0 to
100
Typ
—
—
—
—
—
—
—
—
—
—
C4
2000
Max
-110
-120
-120
-130
550
-50
-80
55
33
—
—
—
Min
200
250
45
30
—
—
—
—
—
—
—
—
—
1100 ± 5%
C5 and I5
–0.5%
2000
± 1%
Typ
0 to
100
—
—
—
—
—
—
—
—
—
—
2000
-120
-130
Max
-110
-120
550
-50
-80
55
33
—
—
—
Min
200
250
45
30
—
—
—
—
—
—
—
—
—
1100 ± 5%
–0.5%
2000 ±
0 to
100
Typ
1%
—
—
—
—
—
—
—
—
—
—
C6
2000
Max
-110
-120
-120
-130
550
-50
-80
55
33
—
—
—
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
Unit
kHz
mV
mV
mV
—
%