DK-DEV-4SGX230N Altera, DK-DEV-4SGX230N Datasheet - Page 31

• Manufacturer Part Number: DK-DEV-4SGX230N
• Description: KIT DEVELOPMENT STRATIX IV
• Manufacturer: Altera
• Series: Stratix® IVr
• Type: FPGAr

Specifications of DK-DEV-4SGX230N

• Contents: Development Board, Universal Power Supply, Cables and Software
• Silicon Manufacturer: Altera
• Core Architecture: FPGA
• Core Sub-architecture: Stratix
• Silicon Core Number: EP4S
• Silicon Family Name: Stratix IV GX
• Rohs Compliant: Yes
• For Use With/related Products: EP4SGX230K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2594

Chapter 1: DC and Switching Characteristics for Stratix IV Devices
Switching Characteristics
Figure 1–1. AC Gain Curves for Equalization Settings 0 to 15 (Bottom to Top)
Table 1–24. Transceiver Specifications for Stratix IV GT Devices (Part 1 of 8)
April 2011 Altera Corporation
Reference Clock
Supported I/O
Standards
Input frequency from
REFCLK input pins
Phase frequency
detector (CMU PLL
and receiver CDR)
Absolute V
REFCLK pin
Operational V
REFCLK pin
Absolute V
REFCLK pin
Rise/fall time
Description
Symbol/
MAX
MIN
MAX
for a
for a
for a
Figure 1–1
Table 1–24
Conditions
—
—
—
—
—
—
shows the top-to-bottom AC gain curve for equalization settings 0 to 15.
lists the Stratix IV GT transceiver specifications.
1.2 V PCML, 1.4 V PCML, 1.5 V PCML, 2.5 V PCML, Differential LVPECL (3), LVDS
–1 Industrial Speed Grade
Min
-0.3
50
50
—
—
—
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
-0.3
Min
50
50
—
—
—
–2 Industrial Speed
Grade
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
Min
-0.3
50
50
—
—
—
–3 Industrial Speed
Grade
Typ
—
—
—
—
—
—
706.25
Max
425
1.6
1.5
0.2
—
1–23
MHz
MHz
Unit
UI
V
V
V