C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 138

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C8051F310-TB

Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F310-TB

Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
C8051F310/1/2/3/4/5/6/7
138
Note:
Note:
Bits7–0: P1.[7:0]
Bits7–0: Analog Input Configuration Bits for P1.7-P1.0 (respectively).
P1.7
R/W
R/W
Bit7
Bit7
Only P1.0–P1.5 are associated with Port pins on the C8051F316/7 devices.
Write - Output appears on I/O pins per Crossbar Registers.
0: Logic Low Output.
1: Logic High Output (high impedance if corresponding P1MDOUT.n bit = 0).
Read - Always reads ‘1’ if selected as analog input in register P1MDIN. Directly reads Port
pin when configured as digital input.
0: P1.n pin is logic low.
1: P1.n pin is logic high.
Only P1.0–P1.5 are associated with Port pins on the C8051F316/7 devices.
Port pins configured as analog inputs have their weak pullup, digital driver, and digital
receiver disabled.
0: Corresponding P1.n pin is configured as an analog input.
1: Corresponding P1.n pin is not configured as an analog input.
P1.6
R/W
R/W
Bit6
Bit6
SFR Definition 13.8. P1MDIN: Port1 Input Mode
P1.5
R/W
R/W
Bit5
Bit5
SFR Definition 13.7. P1: Port1
P1.4
R/W
R/W
Bit4
Bit4
Rev. 1.7
P1.3
R/W
R/W
Bit3
Bit3
P1.2
R/W
R/W
Bit2
Bit2
P1.1
R/W
R/W
Bit1
Bit1
(bit addressable)
P1.0
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
Reset Value
Reset Value
11111111
11111111
0x90
0xF2

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