C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 58

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C8051F310-TB

Manufacturer Part Number
C8051F310-TB
Description
BOARD PROTOTYPING W/C8051F310
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheets

Specifications of C8051F310-TB

Contents
Board
Processor To Be Evaluated
C8051F31x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F310
Silicon Family Name
C8051F31x
Kit Contents
Board
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F310
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
C8051F310/1/2/3/4/5/6/7
58
Bits7–5: UNUSED. Read = 000b; Write = don’t care.
Bits4–0: AMX0N4–0: AMUX0 Negative Input Selection.
Bit7
R
-
Note that when GND is selected as the Negative Input, ADC0 operates in Single-ended
mode. For all other Negative Input selections, ADC0 operates in Differential mode.
Notes:
SFR Definition 5.2. AMX0N: AMUX0 Negative Channel Select
10101–11101
1. Only applies to C8051F310/1/2/3/4/5; selection
2. Only applies to C8051F310/2; selection RESERVED on
AMX0N4–0
Bit6
R
10001
10010
10011
10100
-
00000
00001
00010
00011
00100
00101
00110
01000
01001
01010
01011
01100
01101
10000
RESERVED on C8051F316/7 devices.
C8051F311/3/6/7 devices.
00111
01110
01111
11110
11111
(2)
(2)
(2)
(2)
Bit5
R
-
GND (ADC in Single-Ended Mode)
AMX0N4 AMX0N3 AMX0N2 AMX0N1 AMX0N0 00000000
R/W
Bit4
ADC0 Negative Input
RESERVED
Rev. 1.7
P1.6
P1.7
P2.6
P2.7
P3.1
P3.2
P3.3
P3.4
VREF
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P3.0
R/W
Bit3
(1)
(1)
(1)
(1)
(2)
(2)
(2)
(2)
R/W
Bit2
R/W
Bit1
R/W
Bit0
SFR Address:
Reset Value
0xBA

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