C8051F310-TB Silicon Laboratories Inc, C8051F310-TB Datasheet - Page 141

• Manufacturer Part Number: C8051F310-TB
• Description: BOARD PROTOTYPING W/C8051F310
• Manufacturer: Silicon Laboratories Inc
• Type: MCUr

Specifications of C8051F310-TB

• Contents: Board
• Processor To Be Evaluated: C8051F31x
• Interface Type: USB
• Silicon Manufacturer: Silicon Labs
• Core Architecture: 8051
• Silicon Core Number: C8051F310
• Silicon Family Name: C8051F31x
• Kit Contents: Board
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• For Use With/related Products: C8051F310
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Note:
Bits7–0: Output Configuration Bits for P2.7–P2.0 (respectively): ignored if corresponding bit in regis-
Note:
Bits7–0: P2SKIP[7:0]: Port2 Crossbar Skip Enable Bits.
R/W
R/W
Bit7
Bit7
-
ter P2MDIN is logic 0.
0: Corresponding P2.n Output is open-drain.
1: Corresponding P2.n Output is push-pull.
Only P2.0–P2.5 are associated with Port pins on the C8051F316/7 devices.
These bits select Port pins to be skipped by the Crossbar Decoder. Port pins used as ana-
log inputs (for ADC or Comparator) or used as special functions (VREF input, external oscil-
lator circuit, CNVSTR input) should be skipped by the Crossbar.
0: Corresponding P2.n pin is not skipped by the Crossbar.
1: Corresponding P2.n pin is skipped by the Crossbar.
Only P2.0–P2.3 are associated with the Crossbar.
R/W
R/W
Bit6
Bit6
-
SFR Definition 13.13. P2MDOUT: Port2 Output Mode
SFR Definition 13.14. P2SKIP: Port2 Skip
R/W
R/W
Bit5
Bit5
-
R/W
R/W
Bit4
Bit4
-
Rev. 1.7
R/W
R/W
Bit3
Bit3
C8051F310/1/2/3/4/5/6/7
R/W
R/W
Bit2
Bit2
R/W
R/W
Bit1
Bit1
R/W
R/W
Bit0
Bit0
SFR Address:
SFR Address:
00000000
00000000
Reset Value
Reset Value
0xA6
0xD6
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