C8051F330-TB Silicon Laboratories Inc, C8051F330-TB Datasheet - Page 185
![no-image](/images/manufacturer_photos/0/6/609/silicon_laboratories_inc_sml.jpg)
C8051F330-TB
Manufacturer Part Number
C8051F330-TB
Description
BOARD PROTOTYPING W/C8051F330
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F330-TB
Contents
Board
Processor To Be Evaluated
C8051F33x
Interface Type
RS-232, UART
Operating Supply Voltage
7 V to 15 V
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F330
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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18.3. Timer 3
Timer 3 is a 16-bit timer formed by two 8-bit SFRs: TMR3L (low byte) and TMR3H (high byte). Timer 3 may
operate in 16-bit auto-reload mode or (split) 8-bit auto-reload mode. The T3SPLIT bit (TMR3CN.3) defines
the Timer 3 operation mode.
Timer 3 may be clocked by the system clock, the system clock divided by 12, or the external oscillator
source divided by 8. The external clock mode is ideal for real-time clock (RTC) functionality, where the
internal oscillator drives the system clock while Timer 3 (and/or the PCA) is clocked by an external preci-
sion oscillator. Note that the external oscillator source divided by 8 is synchronized with the system clock.
18.3.1. 16-bit Timer with Auto-Reload
When T3SPLIT (TMR3CN.3) is zero, Timer 3 operates as a 16-bit timer with auto-reload. Timer 3 can be
clocked by SYSCLK, SYSCLK divided by 12, or the external oscillator clock source divided by 8. As the
16-bit timer register increments and overflows from 0xFFFF to 0x0000, the 16-bit value in the Timer 3
reload registers (TMR3RLH and TMR3RLL) is loaded into the Timer 3 register as shown in Figure 18.6,
and the Timer 3 High Byte Overflow Flag (TMR3CN.7) is set. If Timer 3 interrupts are enabled (if EIE1.7 is
set), an interrupt will be generated on each Timer 3 overflow. Additionally, if Timer 3 interrupts are enabled
and the TF3LEN bit is set (TMR3CN.5), an interrupt will be generated each time the lower 8 bits (TMR3L)
overflow from 0xFF to 0x00.
External Clock / 8
SYSCLK / 12
SYSCLK
T3XCLK
0
1
Figure 18.6. Timer 3 16-Bit Mode Block Diagram
M
T
3
H
M
T
3
L
0
1
CKCON
M
H
T
2
T
M
2
L
M
T
1
M
T
0
C
S
A
1
TR3
S
C
A
0
TCLK
Rev. 1.7
TMR3RLL TMR3RLH
TMR3L
TMR3H
C8051F330/1/2/3/4/5
Reload
To ADC
TF3CEN
T3SPLIT
TF3LEN
T3XCLK
TF3H
TF3L
TR3
Interrupt
189
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