C8051F040DK Silicon Laboratories Inc, C8051F040DK Datasheet - Page 138
C8051F040DK
Manufacturer Part Number
C8051F040DK
Description
DEV KIT FOR F040/F041/F042/F043
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Specifications of C8051F040DK
Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F04x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F040
Silicon Family Name
C8051F04x
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
Silicon Laboratories C8051 F040, 041, 042, 043 MCUs
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1205
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C8051F040/1/2/3/4/5/6/7
While in the ADC2 ISR, a PCA interrupt occurs. Recall the PCA interrupt is configured as a high priority
interrupt, while the ADC2 interrupt is configured as a low priority interrupt. Thus, the CIP-51 will now vector
to the high priority PCA ISR. Upon doing so, the CIP-51 will automatically place the SFR page needed to
access the PCA’s special function registers into the SFRPAGE register, SFR Page 0x00. The value that
was in the SFRPAGE register before the PCA interrupt (SFR Page 2 for ADC2) is pushed down the stack
into SFRNEXT. Likewise, the value that was in the SFRNEXT register before the PCA interrupt (in this
case SFR Page 0x0F for Port 5) is pushed down to the SFRLAST register, the “bottom” of the stack. Note
that a value stored in SFRLAST (via a previous software write to the SFRLAST register) will be overwritten.
See Figure 12.6 below.
138
Figure 12.5. SFR Page Stack After ADC2 Window Comparator Interrupt Occurs
SFRPAGE
SFRNEXT
pushed to
SFRPAGE on ADC2
pushed on stack in
SFR Page 0x02
(ADC2)
(Port 5)
Automatically
0x0F
0x02
interrupt
Rev. 1.5
SFRPAGE
SFRNEXT
SFRLAST
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