MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 72

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MPC8536-RDK

Manufacturer Part Number
MPC8536-RDK
Description
BOARD REF COMEXPRESS MPC8536
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets

Specifications of MPC8536-RDK

Contents
CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
enhanced Local Bus Controller (eLBC)
Table 54
Local bus cycle time
Local bus duty cycle
Input setup to local bus clock (except LUPWAIT)
LUPWAIT input setup to local bus clock
Input hold from local bus clock (except LUPWAIT)
LUPWAIT input hold from local bus clock
LALE output transition to LAD/LDP output transition (LATCH hold time)
Local bus clock to output valid (except LAD/LDP and LALE)
72
UPM Mode Input Signal:
Output (Address) Signal:
LA[27:31]/LBCTL/LOE
describes the general timing parameters of the local bus interface at V
Output (Data) Signals:
LAD[0:31]/LDP[0:3]
LAD[0:31]/LDP[0:3]
Output Signals:
Input Signals:
Input Signal:
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
LUPWAIT
LAD[0:31]
LALE
LCLK[n]
Table 54. Local Bus General Timing Parameters—PLL Bypassed
LGTA
Figure 40. Local Bus Signals (PLL Bypass Mode)
Parameter
t
t
t
LBKLOV2
t
LBKLOV1
LBKLOV4
LBKLOV3
t
LBKLOX1
t LBIVKL2
t
LBOTOT
t
t
LBKLOZ2
LBKLOZ1
t
LBIVKH1
t
LBKLOX2
DD
t
Symbol
t LBIXKL2
LBKH/
t
t
t
t
t
t
LBKLOV1
LBIVKH1
LBIXKH1
= 3.3 V DC with PLL disabled.
LBIVKL2
LBIXKL2
LBOTOT
t
LBK
t
LBK
1
Min
-1.4
-2.0
5.1
4.2
1.4
12
43
t
Freescale Semiconductor
LBIXKH1
Max
0.5
57
Unit
ns
ns
ns
ns
ns
ns
ns
%
Notes
4, 5
4, 5
4, 5
4, 5
2
6
4

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