MPC8536-RDK Freescale Semiconductor, MPC8536-RDK Datasheet - Page 78

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MPC8536-RDK

Manufacturer Part Number
MPC8536-RDK
Description
BOARD REF COMEXPRESS MPC8536
Manufacturer
Freescale Semiconductor
Series
PowerQUICC ™r
Type
MPUr
Datasheets

Specifications of MPC8536-RDK

Contents
CSB1880, CSB1801, Cables, Documentation, Enclosure, Power Supply with cord
For Use With/related Products
MPC8536
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
JTAG
2.15.2
This section describes the AC electrical specifications for the IEEE 1149.1 (JTAG) interface of the MPC8536E.
Table 58
At recommended operating conditions (see
78
JTAG external clock frequency of operation
JTAG external clock cycle time
JTAG external clock pulse width measured at 1.4 V
JTAG external clock rise and fall times
TRST assert time
Input setup times:
Input hold times:
Output Valid times:
Output hold times:
Notes:
1. The symbols used for timing specifications herein follow the pattern of t
2. TRST is an asynchronous level sensitive signal. The setup time is for test purposes only.
3.) The output timings are measured at the pins. All output timings assume a purely resistive 50-Ω load. Time-of-flight delays
for inputs and t
device timing (JT) with respect to the time data input signals (D) reaching the valid state (V) relative to the t
(K) going to the high (H) state or setup time. Also, t
signals (D) went invalid (X) relative to the t
reference symbol representation is based on three letters representing the clock of a particular functional. For rise and fall
times, the latter convention is used with the appropriate letter: R (rise) or F (fall).
must be added for trace lengths, vias, and connectors in the system.
provides the JTAG AC timing specifications as defined in
Input current
(V
High-level output voltage
(OV
Low-level output voltage
(OV
Notes:
1. Note that the symbol V
IN
JTAG AC Electrical Specifications
DD
DD
1
= 0 V or V
= min, I
= min, I
(first two letters of functional block)(reference)(state)(signal)(state)
MPC8536E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 3
Parameter
Table 58. JTAG AC Timing Specifications (Independent of SYSCLK)
Parameter
OH
OL
IN
= 2 mA)
= -2 mA)
= V
Table 57. JTAG DC Electrical Characteristics (continued)
DD
)
IN
, in this case, represents the OV
Table
3).
JTG
clock reference (K) going to the high (H) state. Note that, in general, the clock
Symbol
V
V
I
JTDXKH
IN
OH
OL
1
t
JTGR
symbolizes JTAG timing (JT) with respect to the time data input
Symbol
t
t
t
t
t
JTKHKL
JTDVKH
JTDXKH
JTKLDX
JTKLDV
t
t
f
TRST
JTG
JTG
& t
Figure 45
JTGF
IN.
1
Min
for outputs. For example, t
2.4
(first two letters of functional block)(signal)(state) (reference)(state)
through
Min
30
15
25
10
0
0
4
0
Figure
Max
0.4
±5
48.
Max
33.3
10
2
JTDVKH
Freescale Semiconductor
symbolizes JTAG
JTG
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Unit
μA
clock reference
V
V
Notes
2
3
3

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