R0E5212DACPE00 Renesas Electronics America, R0E5212DACPE00 Datasheet - Page 73

• Manufacturer Part Number: R0E5212DACPE00
• Description: EMULATOR DEV COMPACT R8C-2C/D
• Manufacturer: Renesas Electronics America
• Type: In Circuit Debuggerr

Specifications of R0E5212DACPE00

• Contents: Compact Emulator, IDE, Assembler and Linker
• For Use With/related Products: R8C/2C, R8C/2D
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

R0E521000CPE00 User’s Manual
REJ10J0845-0600 Rev.6.00 Aug. 20, 2009
Page 71 of 92
Note on A/D Converter:
Notes on Stack Area:
Note on Accessing Addresses 00000h and 00001h:
Note on the Watchdog Function:
Note on the block 0 rewrite disabled bit (FMR15) and block 1 rewrite disabled bit (FMR16):
Note on Final Evaluation:
Because a flexible cable and other devices are used between the evaluation MCU and the user system, the A/D
converter operates differently from that of the actual MCU.
With this product, the interrupt stack pointer (ISP) is set to 00500h and used as stack area after the reset is
released.
With this product, a maximum 8 bytes of the user stack is consumed as a work area. Therefore, ensure the +8
byte maximum capacity used by the user program as the user stack area. If the user stack does not have enough
area, do not access these areas which cannot be used as stack (SFR area, RAM area which stores data, or ROM
area) as work area. Accessing these areas like this is a cause of user program crashes and destabilized emulator
control.
With the R8C Family MCUs, when a maskable interrupt is generated, the interrupt data (interrupt number and
interrupt request level) stored in addresses 00000h and 00001h are read out. Also, the interrupt request bit is
cleared when address 00000h or 00001h is read out. Consequently, when the address 00000h or 00001h readout
instruction is executed or when address 00000h or 00001h is read out in the cause of a program runaway, a
malfunction occurs in that the interrupt is not executed despite the interrupt request, because the request bit of
the highest priority interrupt factor enabled is cleared.
Although this product emulates the watchdog timer function of the target MCU, note that the count value does
not always match that of the actual MCU. For this reason, when the program is single-stepped successively as in
the case of overstep operation, a watchdog timer interrupt may be generated.
The functions associated with bit 5 (FMR15) and bit 6 (FMR16) of Flash Memory Control Register 1 (FMR1 at
address 001B5h) cannot be used. When writing to FMR15 and FMR16, always be sure to write a 0. These bits
read as 0 when read out.
Be sure to evaluate your system with an actual MCU.
IMPORTANT
4. Hardware Specifications