EVAL-AD1895EB Analog Devices Inc, EVAL-AD1895EB Datasheet - Page 24

• Manufacturer Part Number: EVAL-AD1895EB
• Description: BOARD EVAL FOR AD1895
• Manufacturer: Analog Devices Inc
• Type: Sample Rate Converterr

Specifications of EVAL-AD1895EB

• Rohs Status: RoHS non-compliant
• Contents: Evaluation Board
• For Use With/related Products: AD1895

EVAL-AD1895EB
// OUTPUT SERIAL DATA FORMAT MAPPING
// LJ-24 BITS
// I2S-24 BITS
// TDM-24 BITS
// RJ-24 BITS
// RJ-20 BITS
// LJ-16 BITS
//MASTER_SLAVE MODE MAPPING
// S4 position 7, BOTH SERIAL PORT IN SLAVE MODE
// S4 position 6, OUTPUT SERIAL PORT IN MASTER MODE FSX768
// S4 position 5, OUTPUT SERIAL PORT IN MASTER MODE FSX512
// S4 position 4, OUTPUT SERIAL PORT IN MASTER MODE FSX256
// S4 position 3, INPUT SERIAL PORT IN MATCHED_PHASE MODE
// S4 position 2, INPUT SERIAL PORT IN MASTER MODE FSX768
// S4 position 1, INPUT SERIAL PORT IN MASTER MODE FSX512
// S4 position 0, INPUT SERIAL PORT IN MASTER MODE FSX256
"====================================================================================
EQUATIONS
// AD1896 ASRC Output Serial Port Interface Mode and word length Select
// CS8414 DIT Interface Mode Select. The chip is configured in the LJ mode when AD1896 output
format are
// set either RJ24, RJ20, RJ18 or RJ16. Also need to invert the incoming SCLK signal in the
LJ24, RJ24, RJ20,
// RJ18 and RJ16 mode to match the DIT interface requirment for DIT_SCLK.
// AD1852 Stereo DAC input serial Interface mode select. NOTE that the DAC requires serial
programing for
// RJ20, RJ18, RJ16 mode. Since AD1896 EVB does not allow serial programming of the AD1852
registers,
// AD1852 will be configured in RJ24 mode when AD1896 output port is configured in RJ20, RJ18
// LJ-18 BITS
LJ24 = (LJ & BITS_24);
I2S24 = (I2S & BITS_24);
TDM24 = (TDM & BITS_24);
RJ24 = (RJ & BITS_24);
RJ20 = (RJ & BITS_20);
RJ18 = (RJ & BITS_18);
RJ16 = (RJ & BITS_16);
BOTH_SLAVE =
O_MAS_768
O_MAS_512
O_MAS_256
MATCH_PHASE = (MS_MODE2 & !MS_MODE1 & !MS_MODE0);
IN_MAS_768 = (MS_MODE2 & !MS_MODE1 & MS_MODE0);
IN_MAS_512 = (MS_MODE2 & MS_MODE1 & !MS_MODE0);
IN_MAS_256 = (MS_MODE2 & MS_MODE1 & MS_MODE0);
WDLNGTH_O_1 = WDLNGTH1;
WDLNGTH_O_0 = WDLNGTH0;
SMODE_O_1
SMODE_O_0
M0 = LJ;
M1 = 0;
M2 = I2S;
= (!MS_MODE2 & !MS_MODE1 & MS_MODE0);
= (!MS_MODE2 & MS_MODE1 & !MS_MODE0);
= (!MS_MODE2 & MS_MODE1 & MS_MODE0);
= OPMODE1;
= OPMODE0;
(!MS_MODE2 & !MS_MODE1 & !MS_MODE0);
out_pld.abl