EVAL-AD1895EB Analog Devices Inc, EVAL-AD1895EB Datasheet - Page 6

• Manufacturer Part Number: EVAL-AD1895EB
• Description: BOARD EVAL FOR AD1895
• Manufacturer: Analog Devices Inc
• Type: Sample Rate Converterr

Specifications of EVAL-AD1895EB

• Rohs Status: RoHS non-compliant
• Contents: Evaluation Board
• For Use With/related Products: AD1895

EVAL-AD1895EB
DEFAULT SETUP
EXTERNAL 192 kHz CLOCK GENERATOR CIRCUIT
An external circuit can be used to generate the 192 kHz clock
signals (SCLK, LRCLK) using on-board 128
tor (U15) running at 24.576 MHz. Please refer to Figure 4 for
the schematic and instructions on how to connect the external
circuit to the AD1895EB. In general, external SCLK and LRCLK
can be used for converting the audio input data to 192 kHz rate
by connecting SCLK to SCLK_O (DDO_SCLK_O, HDR5 on
the AD1895EB) and LRCLK to LRCLK_O (DDO_LRCLK_O,
HDR5 on the AD1895EB). On-board SPDIF transmitter CS8404
(U6) does not support sample rates above 96 kHz.
TYPICAL PERFORMANCE
Typical performance of the AD1895, for 1:2 upsampling with 48 kHz:96 kHz sample rates (asynchronous input and output sample
rates) is listed below.
1. DNR, No Filter
2. DNR, A-Weighted
3. THD+N, No Filter
4. Frequency Response
INPUT DATA:
DIRECT DIGITAL INPUT HEADER
HDR3 (DDI)
SET EXTERNALLY
Sample Rate (kHz)
44.100
96.000
125 dBFS, 20 Hz to f
128 dBFS, 20 Hz to f
–115 dBFS, 20 Hz to f
± 0.015 dB, 20 Hz to 20 kHz (0 dBFS Input)
48.000
f
S_IN
LRCLK
SDATA
SCLK
Table IX. MCLK_I Frequencies for Common Sample Rates
in Master Mode
JUMPER JP4
44.1kHz
f
1
S_OUT
2 3
f
S
clock oscilla-
SCLK_I
LRCLK_I
SDATA_I
MCLK_I
S_OUT
S_OUT
33.868MHz CRYSTAL
S_OUT
256
11.289600
12.288000
24.576000
AD1895
U13
/2 (–60 dBFS Input)
/2 (–60 dBFS Input)
LRCLK_O
/2 (0 dBFS Input)
SDATA_O
MCLK_O
SCLK_O
f
S
CLOCK DIVIDER
MCLK_I Frequency (MHz)
ATTACHMENTS
Appendix A
1. External 192 kHz Clock Generator Circuit
2. AD1895 Evaluation Board Block Diagram, Schematics, and
3. Bill of Materials
4. PLD Code
FURTHER INFORMATION
Ordering Information
Order number is EVAL-AD1895EB.
For Application Questions or Technical Support
Contact Analog Devices’ Central Application Department at
1-781-937-1428 for assistance.
256
128
Layout Plots
512
22.579200
24.576000
f
f
S
S
OUTPUT DATA:
DIRECT DIGITAL OUTPUT HEADER
HDR5 (DDO)
f
S
MCLK_I
SCLK_I
LRCLK_I
SDATA_I
SCLK
LRCLK
SDATA
SDATA_I
LRCLK_I
SCLK_I
MCLK_I
AD1852 DAC
CS8404 DIT
256
128
f
f
U12
U6
S
S
768
33.868800
f
S
LEFT OUT
RIGHT OUT
SPDIF OUTPUT