EVAL-AD7654CB Analog Devices Inc, EVAL-AD7654CB Datasheet - Page 7

• Manufacturer Part Number: EVAL-AD7654CB
• Description: BOARD EVAL FOR AD7654
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of EVAL-AD7654CB

• Number Of Adc's: 2
• Number Of Bits: 16
• Sampling Rate (per Second): 500k
• Data Interface: Serial, Parallel
• Inputs Per Adc: 2 Differential
• Input Range: 0 ~ 5 V
• Power (typ) @ Conditions: 120mW @ 500kSPS
• Voltage Supply Source: Analog and Digital
• Operating Temperature: -40°C ~ 85°C
• Utilized Ic / Part: AD7654
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

ABSOLUTE MAXIMUM RATINGS
Table 5.
Parameter
Analog Inputs
Ground Voltage Differences
Supply Voltages
Digital Inputs
Internal Power Dissipation
Internal Power Dissipation
Junction Temperature
Storage Temperature Range
Lead Temperature Range
1
2
3
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
See Analog Inputs section.
Specification is for device in free air:
48-lead LQFP: θ
Specification is for device in free air: 48-lead LFCSP; θ
(Soldering 10 sec)
INAx
REFGND
AGND, DGND, OGND
AVDD, DVDD, OVDD
AVDD to DVDD, AVDD to OVDD
DVDD to OVDD
1
, INBx
1
JA
, REFx, INxN,
= 91°C/W, θ
JC
2
3
= 30°C/W.
Values
±0.3 V
−0.3 V to +7 V
−0.3 V to +7 V
AVDD + 0.3 V to
AGND − 0.3 V
±7 V
−0.3 V to DVDD + 0.3 V
700 mW
2.5 W
150°C
−65°C to +150°C
300°C
JA
= 26°C/W.
Rev. B | Page 7 of 28
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
t
DELAY
*IN SERIAL INTERFACE MODES, THE SYNC, SCLK, AND
SDOUT TIMINGS ARE DEFINED WITH A MAXIMUM LOAD
C
0.8V
TO OUTPUT
L
OF 10pF; OTHERWISE, THE LOAD IS 60pF MAXIMUM.
Figure 2. Load Circuit for Digital Interface Timing
Figure 3. Voltage Reference Levels for Timing
(SDOUT, SYNC, SCLK Outputs, C
PIN
60pF*
2V
0.8V
C
L
1.6mA
500µA
I
I
OL
OH
2V
L
= 10 pF)
t
DELAY
2V
0.8V
1.4V
AD7654