SW006015 Microchip Technology, SW006015 Datasheet - Page 70
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SW006015
Manufacturer Part Number
SW006015
Description
C COMPILER MPLAB C32
Manufacturer
Microchip Technology
Type
Compilerr
Series
PIC32r
Specifications of SW006015
Supported Families
PIC32MX5, MX6, And MX7
Core Architecture
PIC
Kit Contents
Software And Docs
Mcu Supported Families
PIC32 MCUs
Tool Function
Compiler
Supported Devices
PIC32 MCUs
Tool Type
Compiler
Processor Series
PIC32
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
PIC32
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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MPLAB
C32 C Compiler User’s Guide
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variable are named _ramfunc_length. In addition, the linker script provides three
variables that contain the address of the bus matrix registers. These variables are
named _bmxdkpba_address, _bmxdudba_address, and _bmxdupba_address.
The following calculations are used to calculate these addresses:
_bmxdkpba_address = _ramfunc_begin -
ORIGIN(${DATA_MEMORY_LOCATION}) ;
_bmxdudba_address = LENGTH(${DATA_MEMORY_LOCATION}) ;
_bmxdupba_address = LENGTH(${DATA_MEMORY_LOCATION}) ;
The linker script ensures that RAM functions are aligned to a 2K alignment boundary
as is required by the BMXDKPBA register.
FIGURE 5-9:
BUS MATRIX INITIALIZATION
5.7.2.9
INITIALIZE CP0 REGISTERS
The CP0 registers are initialized in the following order:
1. Count register
2. Compare register
3. EBase register
4. IntCtl register
5. Cause register
6. Status register
5.7.2.9.1
Hardware Enable Register (HWREna – CP0 Register 7, Select 0)
This register contains a bit mask that determines which hardware registers are
accessible via the RDHWR instruction. Privileged software may determine which of the
hardware registers are accessible by the RDHWR instruction. In doing so, a register may
be virtualized at the cost of handling a Reserved Instruction Exception, interpreting the
instruction, and returning the virtualized value. For example, if it is not desirable to
provide direct access to the Count register, access to the register may be individually
disabled and the return value can be virtualized by the operating system.
No initialization is performed on this register in the PIC32MX startup code.
© 2007 Microchip Technology Inc.
DS51686A-page 66
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