SW006015 Microchip Technology, SW006015 Datasheet - Page 75

C COMPILER MPLAB C32

SW006015

Manufacturer Part Number
SW006015
Description
C COMPILER MPLAB C32
Manufacturer
Microchip Technology
Type
Compilerr
Series
PIC32r
Datasheets

Specifications of SW006015

Supported Families
PIC32MX5, MX6, And MX7
Core Architecture
PIC
Kit Contents
Software And Docs
Mcu Supported Families
PIC32 MCUs
Tool Function
Compiler
Supported Devices
PIC32 MCUs
Tool Type
Compiler
Processor Series
PIC32
Lead Free Status / RoHS Status
Not applicable / Not applicable
For Use With/related Products
PIC32
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
© 2007 Microchip Technology Inc.
• The virtual address of the instruction that was the direct cause of the debug
• The virtual address of the immediately preceding branch or jump instruction, when
For asynchronous debug exceptions (debug interrupt, complex break), the DEPC
contains the virtual address of the instruction where execution should resume after the
debug handler code is executed.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.10.5 Error Exception Program Counter (ErrorEPC – CP0 Register 30,
This register is a read/write register, similar to the EPC register, except that it is used on
error exceptions. All bits of the ErrorEPC are significant and must be writable. It is also
used to store the program counter on Reset, Soft Reset, and non-maskable interrupt
(NMI) exceptions. The ErrorEPC register contains the virtual address at which
instruction processing can resume after servicing an error. This address can be:
• The virtual address of the instruction that caused the exception, or
• The virtual address of the immediately preceding branch or jump instruction when
Unlike the EPC register, there is no corresponding branch delay slot indication for the
ErrorEPC register.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.10.6 Debug Exception Save Register (DeSave – CP0 Register 31, Select 0)
This register is a read/write register that functions as a simple memory location. This
register is used by the debug exception handler to save on of the GPRs that is then
used to save the rest of the context to a pre-determined memory area (such as in the
EJTAG Probe). This register allows the safe debugging of exception handlers and other
types of code where the existence of a valid stack for context saving cannot be
assumed.
No initialization is performed on this register in the PIC32MX startup code.
5.7.2.11
A procedure is called after initializing the CP0 registers. This procedure allows users to
perform actions during bootstrap (i.e., while Status
the main routine. An empty weak version of this procedure (_on_bootstrap) is
provided with the startup code. This procedure may be used for performing hardware
initialization and/or for initializing the environment required by an RTOS.
5.7.2.12
Immediately before calling the applications main routine, the Status
change the location of the exception vectors from the bootstrap location to the normal
location.
5.7.2.13
The last thing that the startup code performs is a call to the main routine. If the user
returns from main, the startup code goes into an infinite loop.
exception, or
the debug exception causing instruction is in a branch delay slot, and the Debug
Branch Delay (DBD) bit in the Debug register is set.
the error causing instruction is a branch delay slot.
CALL “ON BOOTSTRAP” PROCEDURE
CHANGE LOCATION OF EXCEPTION VECTORS
CALL MAIN
Select 0)
BEV
is set) and before entering into
BEV
DS51686A-page 71
is cleared to

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