TOOLSTICK542PP Silicon Laboratories Inc, TOOLSTICK542PP Datasheet - Page 198
![PLATFORM PROG TOOLSTICK F542](/photos/9/33/93333/toolstick542pp_sml.jpg)
TOOLSTICK542PP
Manufacturer Part Number
TOOLSTICK542PP
Description
PLATFORM PROG TOOLSTICK F542
Manufacturer
Silicon Laboratories Inc
Series
ToolStickr
Type
Microcontroller Programmerr
Specifications of TOOLSTICK542PP
Contents
2 Boards and USB Connecting Cable
Processor To Be Evaluated
C8051F542
Interface Type
USB
Operating Supply Voltage
2.7 V to 3.6 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
C8051F542
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1718
- Current page: 198 of 274
- Download datasheet (3Mb)
C8051F54x
20.5.1. Write Sequence (Master)
During a write sequence, an SMBus master writes data to a slave device. The master in this transfer will be
a transmitter during the address byte, and a transmitter during all data bytes. The SMBus interface gener-
ates the START condition and transmits the first byte containing the address of the target slave and the
data direction bit. In this case the data direction bit (R/W) will be logic 0 (WRITE). The master then trans-
mits one or more bytes of serial data. After each byte is transmitted, an acknowledge bit is generated by
the slave. The transfer is ended when the STO bit is set and a STOP is generated. Note that the interface
will switch to Master Receiver Mode if SMB0DAT is not written following a Master Transmitter interrupt.
Figure 20.5 shows a typical master write sequence. Two transmit data bytes are shown, though any num-
ber of bytes may be transmitted. Notice that all of the ‘data byte transferred’ interrupts occur after the ACK
cycle in this mode.
198
S
Received by SMBus
Interface
Transmitted by
SMBus Interface
SLA
Figure 20.5. Typical Master Write Sequence
W
A
Data Byte
Rev. 1.1
Interrupts
A
S = START
P = STOP
A = ACK
W = WRITE
SLA = Slave Address
Data Byte
A
P
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