PESD3V3L5UY,115 NXP Semiconductors, PESD3V3L5UY,115 Datasheet - Page 10

• Manufacturer Part Number: PESD3V3L5UY,115
• Description: DIODE 5FOLD ESD PROTECT SOT363
• Manufacturer: NXP Semiconductors

Specifications of PESD3V3L5UY,115

• Package / Case: SC-70-6, SC-88, SOT-363
• Voltage - Reverse Standoff (typ): 3.3V
• Voltage - Breakdown: 5.3V
• Power (watts): 25W
• Polarization: 5 Channel Array - Unidirectional
• Mounting Type: Surface Mount
• Polarity: Unidirectional
• Channels: 5 Channels
• Clamping Voltage: 12 V
• Operating Voltage: 3.3 V
• Breakdown Voltage: 5.6 V
• Peak Surge Current: 2.5 A
• Peak Pulse Power Dissipation: 25 W
• Capacitance: 22 pF
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Dimensions: 1.35(Max) mm W x 2.2(Max) mm L
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 568-4043-2; 934057802115; PESD3V3L5UY T/R; PESD3V3L5UY T/R

NXP Semiconductors
7. Application information
PESDXL5UF_V_Y_2
Product data sheet
Fig 9. Typical application for unidirectional
application of five lines
The devices are designed for the protection of up to five unidirectional data or signal lines
from the damage caused by ESD and surge pulses. The devices may be used on lines
where the signal polarities are both, positive and negative with respect to ground. The
devices provide a surge capability of 25 W per line for an 8/20 s waveform each.
Circuit board layout and protection device placement
Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended:
1. Place the device as close to the input terminal or connector as possible.
2. The path length between the device and the protected line should be minimized.
3. Keep parallel signal paths to a minimum.
4. Avoid running protected conductors in parallel with unprotected conductors.
5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
6. Minimize the length of the transient return path to ground.
7. Avoid using shared transient return paths to a common ground point.
8. Ground planes should be used whenever possible. For multilayer PCBs, use ground
high-speed data lines
ground loops.
vias.
DUT
Low capacitance unidirectional fivefold ESD protection diode arrays
006aab144
GND
Rev. 02 — 8 January 2008
Fig 10. Typical application for bidirectional application
of four lines
PESDxL5UF/V/Y
high-speed data lines
DUT
© NXP B.V. 2008. All rights reserved.
006aab145
GND
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