ESDALC6V1-5M6 STMicroelectronics, ESDALC6V1-5M6 Datasheet

TRANSIL ARRAY ESD 6.1V MICR 6QFN

ESDALC6V1-5M6

Manufacturer Part Number
ESDALC6V1-5M6
Description
TRANSIL ARRAY ESD 6.1V MICR 6QFN
Manufacturer
STMicroelectronics
Series
TRANSIL™r
Datasheet

Specifications of ESDALC6V1-5M6

Voltage - Reverse Standoff (typ)
3V
Voltage - Breakdown
6.1V
Polarization
5 Channel Array - Unidirectional
Mounting Type
Surface Mount
Package / Case
6-UQFN, 6-µQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
497-5780-2
ESDALC6V1-5M6

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ESDALC6V1-5M6
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Features
Complies with the following standards
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
February 2008
High ESD protection level
High integration
Suitable for high density boards
4 unidirectional Transil diodes
(ESDALC6V1M6)
5 unidirectional Transil diodes
(ESDALC6V1-5M6)
Breakdown Voltage V
Low diode capacitance (12 pF typ at 0 V)
Low leakage current < 70 nA
Very small PCB area: 1.45 mm
500 microns pitch
Lead-free package
IEC 61000-4-2
– 15 kV (air discharge)
– 8 kV (contact discharge)
MIL STD 883G- Method 3015-7: class3B
– >8 kV (human body model)
Computers
Printers
Communication systems
Cellular phone handsets and accessories
Video equipment
4- and 5-line low capacitance Transil™ arrays for ESD protection
BR
= 6.1 V min
ESDALC6V1M6, ESDALC6V1-5M6
²
Rev 5
Figure 1.
Description
The ESDALC6V1xxM6 are monolithic arrays
designed to protect up to 4 or 5 lines against ESD
transients.
The device is ideal for applications where both
reduced print circuit board space and power
absorption capability are required.
TM: Transil is a trademark of STMicroelectronics
Functional diagram
GND
GND
I/O2
I/O2
I/O1
I/O1
Micro QFN package
ESDALC6V1-5M6
ESDALC6V1M6
1
1
2
3
2
3
6
6
4
4
5
5
GND
I/O3
I/O4
I/O3
I/O5
I/O5
www.st.com
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ESDALC6V1-5M6 Summary of contents

Page 1

... Printers ■ Communication systems ■ Cellular phone handsets and accessories ■ Video equipment February 2008 ESDALC6V1M6, ESDALC6V1-5M6 Figure 1. ² Description The ESDALC6V1xxM6 are monolithic arrays designed to protect lines against ESD transients. The device is ideal for applications where both reduced print circuit board space and power absorption capability are required ...

Page 2

... Forward voltage drop F Symbol ( mA DC MHz amb 2/11 amb Parameter (1) = 25° C) amb Parameter RM Test Condition = 30 mV osc RMS - 25° (25° ESDALC6V1M6, ESDALC6V1-5M6 = 25° C) Value ±15 ± initial = amb 125 -55 + 150 260 -40 + 125 Slope Min Typ Max 6.1 7 Unit ° C ° C ° C ° ...

Page 3

... ESDALC6V1M6, ESDALC6V1-5M6 Figure 2. Relative variation of peak pulse power versus initial junction temperature °C 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 Figure 4. Clamping voltage versus peak pulse current (typical values, 8/20 µs waveform) 100.0 100.0 8/20µs 8/20µs ...

Page 4

... Package M6 = Micro QFN 6 leads 4/11 Figure 9. 0.00 -30.00 -60.00 -90.00 -120.00 100.0M 1.0G Figure 11. ESD response to IEC 6100-4-2 ESDALC6V1M6, ESDALC6V1-5M6 Analog crosstalk measurements between channels dB f/Hz 100.0k 1.0M 10.0M 100.0M 1.0G (-15 kV air discharge) on each channel ESDA LC 6V1 ...

Page 5

... ESDALC6V1M6, ESDALC6V1-5M6 3 Package information ● Epoxy meets UL94 order to meet environmental requirements, ST offers these devices in ECOPACK packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label ...

Page 6

... PCB. Only pin 1 mark used for this purpose. 6/11 Dot identifying Pin A1 location Dot identifying Pin A1 location 4.00+/-0.1 4.00+/-0.1 2.0+/-0.05 2.0+/-0. 0.75 0.75 1.20 1.20 User direction of unreeling User direction of unreeling X: Marking X: Marking ESDALC6V1M6, ESDALC6V1-5M6 1.5 +/- 0.1 1.5 +/- 0 4.00 4.00 ...

Page 7

... ESDALC6V1M6, ESDALC6V1-5M6 4 Recommendation on PCB assembly 4.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 15. Stencil opening dimensions b) General design rule Stencil thickness ( 125 µm Aspect Ratio Aspect Area 2. Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90% ...

Page 8

... To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. 8/11 ESDALC6V1M6, ESDALC6V1-5M6 ...

Page 9

... ESDALC6V1M6, ESDALC6V1-5M6 4.5 Reflow profile Figure 17. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) Temperature (°C) 260°C max 260°C max 255°C 255°C 220°C 220°C 180°C 180°C 125 °C 125 °C ...

Page 10

... Updated package dimensions in Table 1. Reformatted to current standard. 4 Added note on marking rotation in section 3. Package information. Reformatted to current standards. Corrected inch measurements in 5 Table 3 on page 5. Added assembly ESDALC6V1M6, ESDALC6V1-5M6 Weight Base qty Delivery mode 2.2 mg 3000 Tape and reel 2.2 mg 3000 Tape and reel ...

Page 11

... ESDALC6V1M6, ESDALC6V1-5M6 Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. ...

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