PIC12C508A-04I/P Microchip Technology, PIC12C508A-04I/P Datasheet - Page 26

• Manufacturer Part Number: PIC12C508A-04I/P
• Description: IC MCU OTP 512X12 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C508A-04I/P

• Program Memory Type: OTP
• Program Memory Size: 768B (512 x 12)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 25 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DVMCPA, ICE2000
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC12C5XX
FIGURE 6-2:
FIGURE 6-3:
TABLE 6-1:
DS40139E-page 26
Address
01h
N/A
N/A
Legend: Shaded cells not used by Timer0,
Instruction
PC
(Program
Counter)
Instruction
Fetch
PC
(Program
Counter)
Fetch
Timer0
Timer0
Instruction
Execute
Instruction
Executed
TMR0
OPTION
TRIS
Name
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
T0
T0
TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
REGISTERS ASSOCIATED WITH TIMER0
PC-1
PC-1
Timer0 - 8-bit real-time clock/counter
GPWU
Bit 7
—
MOVWF TMR0
MOVWF TMR0
T0+1
PC
PC
T0+1
GPPU
Bit 6
—
MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
MOVF TMR0,W MOVF TMR0,W MOVF TMR0,W
T0+2
Write TMR0
executed
Write TMR0
executed
PC+1
PC+1
T0CS
-
Bit 5
GP5
= unimplemented, x = unknown, u = unchanged,
T0SE
Bit 4
GP4
Read TMR0
reads NT0
Read TMR0
reads NT0
PC+2
PC+2
Bit 3
PSA
GP3
NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Bit 2
GP2
PS2
PC+3
PC+3
NT0
Bit 1
GP1
PS1
MOVF TMR0,W
MOVF TMR0,W
Read TMR0
reads NT0
Read TMR0
reads NT0
PC+4
PC+4
Bit 0
PS0
GP0
MOVF TMR0,W
MOVF TMR0,W
1999 Microchip Technology Inc.
NT0+1
xxxx xxxx uuuu uuuu
1111 1111 1111 1111
--11 1111 --11 1111
Read TMR0
reads NT0 + 1
Read TMR0
reads NT0
Power-On
Value on
PC+5
PC+5
Reset
NT0+2
NT0+1
Read TMR0
reads NT0 + 2
Read TMR0
reads NT0 + 1
PC+6
PC+6
Value on
All Other
Resets
T0