PIC12C508A-04I/P Microchip Technology, PIC12C508A-04I/P Datasheet - Page 32

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PIC12C508A-04I/P

Manufacturer Part Number
PIC12C508A-04I/P
Description
IC MCU OTP 512X12 8DIP
Manufacturer
Microchip Technology
Series
PIC® 12Cr

Specifications of PIC12C508A-04I/P

Program Memory Type
OTP
Program Memory Size
768B (512 x 12)
Package / Case
8-DIP (0.300", 7.62mm)
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
5
Ram Size
25 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC12C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
25 B
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
5
Number Of Timers
1
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
DVMCPA, ICE2000
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
Eeprom Size
-
Data Converters
-
Connectivity
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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PIC12C5XX
FIGURE 7-3:
FIGURE 7-4:
7.2
After generating a START condition, the bus master
transmits a control byte consisting of a slave address
and a Read/Write bit that indicates what type of opera-
tion is to be performed. The slave address consists of
a 4-bit device code (1010) followed by three don’t care
bits.
The last bit of the control byte determines the operation
to be performed. When set to a one a read operation is
selected, and when set to a zero a write operation is
selected. (Figure 7-5). The bus is monitored for its cor-
responding slave address all the time. It generates an
acknowledge bit if the slave address was true and it is
not in a programming mode.
DS40139E-page 32
SCL
SDA
SCL
SDA
(A)
Device Addressing
CONDITION
START
(B)
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
ACKNOWLEDGE TIMING
1
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
2
3
Data from transmitter
4
ACKNOWLEDGE
ADDRESS OR
VALID
5
(C)
6
TO CHANGE
ALLOWED
7
DATA
Acknowledge
FIGURE 7-5:
8
Start Bit
Bit
S
9
1
Device Select
(D)
1
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
0
Bits
Data from transmitter
CONTROL BYTE FORMAT
Slave Address
1
2
0
1999 Microchip Technology Inc.
3
Read/Write Bit
Don’t Care
X
Acknowledge Bit
Bits
X
X
CONDITION
R/W
STOP
(C)
ACK
(A)

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