PIC12C508A-04I/P Microchip Technology, PIC12C508A-04I/P Datasheet - Page 53

• Manufacturer Part Number: PIC12C508A-04I/P
• Description: IC MCU OTP 512X12 8DIP
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C508A-04I/P

• Program Memory Type: OTP
• Program Memory Size: 768B (512 x 12)
• Package / Case: 8-DIP (0.300", 7.62mm)
• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC12C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 25 B
• Maximum Clock Frequency: 4 MHz
• Number Of Programmable I/os: 5
• Number Of Timers: 1
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: DVMCPA, ICE2000
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: ISPICR1 - ADAPTER IN-CIRCUIT PROGRAMMINGDVMCPA - KIT DVR BOARD EVAL SYSTEM MXDEV1DVA12XP080 - ADAPTER DEVICE FOR MPLAB-ICEAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

INCF
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected: None
Encoding:
Description:
Words:
Cycles:
Example:
1999 Microchip Technology Inc.
Before Instruction
After Instruction
Before Instruction
After Instruction
CNT
Z
CNT
Z
PC
CNT
if CNT
PC
if CNT
PC
Increment f
[ label ]
0
d
(f) + 1
The contents of register ’f’ are incre-
mented. If ’d’ is 0 the result is placed in
the W register. If ’d’ is 1 the result is
placed back in register ’f’.
1
1
INCF
=
=
=
=
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
The contents of register ’f’ are incre-
mented. If ’d’ is 0 the result is placed in
the W register. If ’d’ is 1 the result is
placed back in register ’f’.
If the result is 0, then the next instruc-
tion, which is already fetched, is dis-
carded and an NOP is executed
instead making it a two cycle instruc-
tion.
1
1(2)
HERE
CONTINUE •
=
=
=
=
=
0010
0011
f
f
[0,1]
[0,1]
0xFF
0
0x00
1
address (HERE)
CNT + 1;
0,
address (CONTINUE);
0,
address (HERE +1)
31
31
CNT,
(dest)
(dest), skip if result = 0
INCF f,d
INCFSZ f,d
10df
11df
INCFSZ
GOTO
•
•
1
ffff
ffff
LOOP
CNT,
1
IORLW
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
IORWF
Syntax:
Operands:
Operation:
Status Affected: Z
Encoding:
Description:
Words:
Cycles:
Example:
Before Instruction
After Instruction
Before Instruction
After Instruction
W
W
Z
RESULT =
W
RESULT =
W
Z
=
=
=
Inclusive OR literal with W
[ label ]
0
(W) .OR. (k)
The contents of the W register are
OR’ed with the eight bit literal 'k'. The
result is placed in the W register.
1
1
IORLW
0x9A
0xBF
0
Inclusive OR W with f
[ label ]
0
d
(W).OR. (f)
Inclusive OR the W register with regis-
ter 'f'. If 'd' is 0 the result is placed in
the W register. If 'd' is 1 the result is
placed back in register 'f'.
1
1
IORWF
=
=
=
1101
0001
k
f
[0,1]
0x13
0x91
0x13
0x93
0
PIC12C5XX
31
255
0x35
IORLW k
IORWF
kkkk
00df
(dest)
(W)
RESULT, 0
DS40139E-page 53
kkkk
ffff
f,d