DSPIC30F3012-20I/SO Microchip Technology, DSPIC30F3012-20I/SO Datasheet - Page 89

• Manufacturer Part Number: DSPIC30F3012-20I/SO
• Description: IC DSPIC MCU/DSP 24K 18SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F3012-20I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 12
• Program Memory Size: 24KB (8K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 12
• Flash Memory Size: 24KB
• Supply Voltage Range: 2.5V To 5.5V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT18SO-1 - SOCKET TRANSITION 18SOIC 300MILAC30F005 - MODULE SCKT DSPIC30F 18DIP/SOIC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F301220ISO

12.4.2
The PWM period is specified by writing to the PRx
register. The PWM period can be calculated using
Equation 12-1.
EQUATION 12-1:
PWM frequency is defined as 1/[PWM period].
FIGURE 12-2:
12.5
When the CPU enters Sleep mode, all internal clocks
are stopped. Therefore, when the CPU enters the
Sleep state, the output compare channel drives the pin
to the active state that was observed prior to entering
the CPU Sleep state.
For example, if the pin was high when the CPU entered
the Sleep state, the pin remains high. Likewise, if the
pin was low when the CPU entered the Sleep state, the
pin remains low. In either case, the output compare
module resumes operation when the device wakes up.
12.6
When the CPU enters the Idle mode, the output
compare module can operate with full functionality.
The output compare channel operates during the CPU
Idle mode if the OCSIDL bit (OCxCON<13>) is at logic
‘0’ and the selected time base (Timer2 or Timer3) is
enabled and the TSIDL bit of the selected timer is set
to logic ‘0’.
© 2008 Microchip Technology Inc.
PWM period = [(PRx) + 1] • 4 • T
Output Compare Operation During
CPU Sleep Mode
Output Compare Operation During
CPU Idle Mode
PWM PERIOD
OCxR = OCxRS
(Interrupt Flag)
TMR3 = PR3
T3IF = 1
(TMRx prescale value)
PWM OUTPUT TIMING
Duty Cycle
dsPIC30F2011/2012/3012/3013
OSC
Period
TMR3 = Duty Cycle
•
(OCxR)
OCxR = OCxRS
(Interrupt Flag)
TMR3 = PR3
T3IF = 1
When the selected TMRx is equal to its respective
period register, PRx, the following four events occur on
the next increment cycle:
• TMRx is cleared.
• The OCx pin is set.
• The PWM duty cycle is latched from OCxRS into
• The corresponding timer interrupt flag is set.
See Figure 12-2 for key PWM period comparisons.
Timer3 is referred to in Figure 12-2 for clarity.
12.7
The output compare channels have the ability to
generate an interrupt on a compare match, for
whichever Match mode has been selected.
For all modes except the PWM mode, when a compare
event occurs, the respective interrupt flag (OCxIF) is
asserted and an interrupt is generated if enabled. The
OCxIF bit is located in the corresponding IFS register
and must be cleared in software. The interrupt is
enabled via the respective compare interrupt enable
(OCxIE) bit located in the corresponding IEC Control
register.
For the PWM mode, when an event occurs, the
respective timer interrupt flag (T2IF or T3IF) is asserted
and an interrupt is generated if enabled. The IF bit is
located in the IFS0 register and must be cleared in
software. The interrupt is enabled via the respective
timer interrupt enable bit (T2IE or T3IE) located in the
IEC0 Control register. The output compare interrupt
flag is never set during the PWM mode of operation.
- Exception 1: If PWM duty cycle is 0x0000,
- Exception 2: If duty cycle is greater than PRx,
OCxR.
TMR3 = Duty Cycle
the OCx pin remains low.
the pin remains high.
(OCxR)
Output Compare Interrupts
DS70139F-page 89