DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 334

• Manufacturer Part Number: DSPIC33FJ128GP206A-I/MR
• Description: IC DSPIC MCU/DSP 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128GP206A-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Product: DSCs
• Processor Series: DSPIC33F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC33FJXXXGPX06A/X08A/X10A
Reset
Reset Sequence.................................................................. 91
Resets ................................................................................. 85
S
Serial Peripheral Interface (SPI) ....................................... 181
Software Simulator (MPLAB SIM)..................................... 265
Software Stack Pointer, Frame Pointer
Special Features of the CPU............................................. 247
SPI Module
Symbols Used in Opcode Descriptions............................. 256
System Control
T
Temperature and Voltage Specifications
Timer1 ............................................................................... 167
Timer2/3, Timer4/5, Timer6/7 and Timer8/9 ..................... 169
Timing Characteristics
Timing Diagrams
DS70593B-page 334
IPC9 (Interrupt Priority Control 9) ............................. 125
NVMCOM (Flash Memory Control) ....................... 81, 82
OCxCON (Output Compare x Control) ..................... 179
OSCCON (Oscillator Control) ................................... 150
OSCTUN (FRC Oscillator Tuning) ............................ 154
PLLFBD (PLL Feedback Divisor) .............................. 153
PMD1 (Peripheral Module Disable Control Register 1)...
PMD2 (Peripheral Module Disable Control Register 2)...
PMD3 (Peripheral Module Disable Control Register 3)...
RCON (Reset Control) ................................................ 86
RSCON (DCI Receive Slot Control).......................... 233
SPIxCON1 (SPIx Control 1) ...................................... 183
SPIxCON2 (SPIx Control 2) ...................................... 185
SPIxSTAT (SPIx Status and Control) ....................... 182
SR (CPU Status) ................................................... 32, 96
T1CON (Timer1 Control)........................................... 168
TSCON (DCI Transmit Slot Control) ......................... 233
TxCON (T2CON, T4CON, T6CON or T8CON Control) ..
TyCON (T3CON, T5CON, T7CON or T9CON Control) ..
UxMODE (UARTx Mode) .......................................... 196
UxSTA (UARTx Status and Control) ......................... 198
Clock Source Selection ............................................... 88
Special Function Register Reset States ..................... 89
Times .......................................................................... 88
CALLL Stack Frame.................................................... 69
SPI1 Register Map ...................................................... 56
SPI2 Register Map ...................................................... 56
Register Map............................................................... 68
AC ..................................................................... 276, 310
CLKO and I/O ........................................................... 279
10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
10-bit A/D Conversion (CHPS<1:0> = 01, SIMSAM = 0,
12-bit A/D Conversion (ASAM = 0, SSRC = 000) ..... 302
CAN I/O..................................................................... 298
DCI AC-Link Mode .................................................... 297
DCI Multi -Channel, I
External Clock ........................................................... 277
I2Cx Bus Data (Master Mode) .................................. 291
I2Cx Bus Data (Slave Mode) .................................... 293
159
161
163
172
173
ASAM = 0, SSRC<2:0> = 000) ......................... 304
ASAM = 1, SSRC<2:0> = 111, SAMC<4:0> =
00001)............................................................... 305
2
S Modes ................................. 295
Preliminary
Timing Requirements
Timing Specifications
U
UART Module
V
Voltage Regulator (On-Chip) ............................................ 252
W
Watchdog Timer (WDT)............................................ 247, 253
WWW Address ................................................................. 335
WWW, On-Line Support ..................................................... 19
I2Cx Bus Start/Stop Bits (Master Mode)................... 291
I2Cx Bus Start/Stop Bits (Slave Mode)..................... 293
Input Capture (CAPx) ............................................... 284
OC/PWM................................................................... 285
Output Compare (OCx)............................................. 284
Reset, Watchdog Timer, Oscillator Start-up Timer and
SPIx Master Mode (CKE = 0) ................................... 286
SPIx Master Mode (CKE = 1) ................................... 287
SPIx Slave Mode (CKE = 0) ..................................... 288
SPIx Slave Mode (CKE = 1) ..................................... 289
Timer1, 2, 3, 4, 5, 6, 7, 8, 9 External Clock .............. 282
ADC Conversion (10-bit mode)................................. 315
ADC Conversion (12-bit Mode)................................. 315
CLKO and I/O ........................................................... 279
DCI AC-Link Mode............................................ 297, 299
DCI Multi-Channel, I
External Clock........................................................... 277
Input Capture ............................................................ 284
SPIx Master Mode (CKE = 0) ................................... 311
SPIx Module Master Mode (CKE = 1) ...................... 311
SPIx Module Slave Mode (CKE = 0) ........................ 312
SPIx Module Slave Mode (CKE = 1) ........................ 312
10-bit A/D Conversion Requirements ....................... 306
12-bit A/D Conversion Requirements ....................... 303
CAN I/O Requirements ............................................. 298
I2Cx Bus Data Requirements (Master Mode)........... 292
I2Cx Bus Data Requirements (Slave Mode)............. 294
Output Compare Requirements................................ 284
PLL Clock ......................................................... 278, 310
Reset, Watchdog Timer, Oscillator Start-up Timer, Pow-
Simple OC/PWM Mode Requirements ..................... 285
SPIx Master Mode (CKE = 0) Requirements............ 286
SPIx Master Mode (CKE = 1) Requirements............ 287
SPIx Slave Mode (CKE = 0) Requirements.............. 288
SPIx Slave Mode (CKE = 1) Requirements.............. 290
Timer1 External Clock Requirements ....................... 282
Timer2, Timer4, Timer6 and Timer8 External Clock Re-
Timer3, Timer5, Timer7 and Timer9 External Clock Re-
UART1 Register Map.................................................. 56
UART2 Register Map.................................................. 56
Programming Considerations ................................... 253
Power-up Timer ................................................ 280
er-up Timer and Brown-out Reset Requirements ...
281
quirements........................................................ 283
quirements........................................................ 283
2
S Modes.......................... 296, 299
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