ATMEGA16L-8AU Atmel, ATMEGA16L-8AU Datasheet - Page 243

• Manufacturer Part Number: ATMEGA16L-8AU
• Description: IC AVR MCU 16K 8MHZ 3V 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16L-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2466T–AVR–07/10
Table 94. ATmega16 Boundary-scan Order (Continued)
Bit Number
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
Signal Name
PB7.Data
PB7.Control
PB7.Pullup_Enable
RSTT
RSTHV
EXTCLKEN
OSCON
RCOSCEN
OSC32EN
EXTCLK (XTAL1)
OSCCK
RCCK
OSC32CK
TWIEN
PD0.Data
PD0.Control
PD0.Pullup_Enable
PD1.Data
PD1.Control
PD1.Pullup_Enable
PD2.Data
PD2.Control
PD2.Pullup_Enable
PD3.Data
PD3.Control
PD3.Pullup_Enable
PD4.Data
PD4.Control
PD4.Pullup_Enable
PD5.Data
PD5.Control
PD5.Pullup_Enable
PD6.Data
PD6.Control
PD6.Pullup_Enable
PD7.Data
Module
Reset Logic
(Observe-Only)
Enable signals for main clock/Oscillators
Clock input and Oscillators for the main clock
(Observe-Only)
TWI
Port D
ATmega16(L)
243