ATMEGA16L-8AU Atmel, ATMEGA16L-8AU Datasheet - Page 47

• Manufacturer Part Number: ATMEGA16L-8AU
• Description: IC AVR MCU 16K 8MHZ 3V 44TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA16L-8AU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Processor Series: ATMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: JTAG/SPI/UART
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• For Use With: ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2466T–AVR–07/10
When the BOOTRST Fuse is unprogrammed, the Boot section size set to 2 Kbytes and the
IVSEL bit in the GICR Register is set before any interrupts are enabled, the most typical and
general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed and the Boot section size set to 2 Kbytes, the most
typical and general program setup for the Reset and Interrupt Vector Addresses is:
When the BOOTRST Fuse is programmed, the Boot section size set to 2 Kbytes and the IVSEL
bit in the GICR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
Address
$000
$001
$002
$003
$004
$005
;
.org $1C02
$1C02
$1C04
...
$1C28
Address
.org $002
$002
$004
...
$028
;
.org $1C00
$1C00
$1C01
$1C02
$1C03
$1C04
$1C05
Address
.org $1C00
$1C00
$1C02
$1C04
...
$1C28
;
$1C2A
$1C2B
$1C2C
$1C2D
$1C2E
$1C2F
Labels
RESET:
....
Labels
....
RESET:
Labels
....
RESET:
ldi
Code
ldi
out
out
sei
<instr>
jmp
jmp
..
jmp
jmp
jmp
..
jmp
ldi
out
ldi
out
sei
<instr>
Code
jmp
jmp
jmp
..
jmp
ldi
out
ldi
out
sei
<instr>
r16,low(RAMEND)
r16,high(RAMEND) ; Main program start
SPH,r16
SPL,r16
EXT_INT0
EXT_INT1
SPM_RDY
Code
EXT_INT0
EXT_INT1
SPM_RDY
r16,high(RAMEND) ; Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
EXT_INT1
SPM_RDY
r16,high(RAMEND) ; Main program start
SPH,r16
r16,low(RAMEND)
SPL,r16
xxx
xxx
xxx
; Reset handler
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
Comments
; Set Stack Pointer to top of RAM
; Enable interrupts
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; IRQ0 Handler
; IRQ1 Handler
;
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Enable interrupts
; Set Stack Pointer to top of RAM
; Enable interrupts
Comments
Comments
ATmega16(L)
47