ATMEGA162-16PU Atmel, ATMEGA162-16PU Datasheet - Page 177

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA162-16PU

Manufacturer Part Number
ATMEGA162-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
35
Interface
JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 2-16-bit
Voltage, Range
2.7-5.5 V
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Receiving Frames with
9 Data Bits
2513K–AVR–07/09
If 9-bit characters are used (UCSZ=7) the ninth bit must be read from the RXB8 bit in UCSRB
before reading the low bits from the UDR. This rule applies to the FE, DOR and UPE Status
Flags as well. Read status from UCSRA, then data from UDR. Reading the UDR I/O location will
change the state of the receive buffer FIFO and consequently the TXB8, FE, DOR and UPE bits,
which all are stored in the FIFO, will change.
The following code example shows a simple USART receive function that handles both nine bit
characters and the status bits.
Note:
Assembly Code Example
C Code Example
USART_Receive:
USART_ReceiveNoError:
unsigned int USART_Receive( void )
{
}
; Wait for data to ?e received
sbis UCSRA, RXC
rjmp USART_Receive
; Get status and 9t? bit, then data from buffer
in
in
in
; If error, return ?1
andi r18,(1<<FE)|(1<<DOR)|(1<<UPE)
breq USART_ReceiveNoError
ldi
ldi
; Filter the 9th bi?, then return
lsr
andi r17, 0x01
ret
unsigned char statu?, resh, resl;
/* Wait for data to?be received */
while ( !(UCSRA & (?<<RXC)) )
/* Get status and 9?h bit, then data */
/* from buffer */
status = UCSRA;
resh = UCSRB;
resl = UDR;
/* If error, return?-1 */
if ( status & (1<<F?)|(1<<DOR)|(1<<UPE) )
/* Filter the 9th b?t, then return */
resh = (resh >> 1) & 0x0?;
return ((resh << 8)?| resl);
1. The example code assumes that the part specific header file is included.
return -1;
r18, UCSRA
r17, UCSRB
r16, UDR
r17, HIGH(-1)
r16, LOW(-1)
r17
;
(1)
(1)
ATmega162/V
177

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