ATMEGA162-16PU Atmel, ATMEGA162-16PU Datasheet - Page 240

IC AVR MCU 16K 16MHZ 5V 40DIP

ATMEGA162-16PU

Manufacturer Part Number
ATMEGA162-16PU
Description
IC AVR MCU 16K 16MHZ 5V 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA162-16PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
JTAG/SPI/USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
35
Number Of Timers
4
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
Cpu Speed
16 MIPS
Eeprom Memory
512 Bytes
Input Output
35
Interface
JTAG/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PDIP
Programmable Memory
16K Bytes
Timers
2-8-bit, 2-16-bit
Voltage, Range
2.7-5.5 V
Package
40PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEMATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Reading the Flash
Reading the EEPROM
Programming the
Fuse Low Bits
240
ATmega162/V
Figure 99. Programming the EEPROM Waveforms
The algorithm for reading the Flash memory is as follows (refer to
page 237
1. A: Load Command “0000 0010”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. Set OE to “0”, and BS1 to “0”. The Flash word low byte can now be read at DATA.
5. Set BS to “1”. The Flash word high byte can now be read at DATA.
6. Set OE to “1”.
The algorithm for reading the EEPROM memory is as follows (refer to
on page 237
1. A: Load Command “0000 0011”.
2. G: Load Address High Byte (0x00 - 0xFF).
3. B: Load Address Low Byte (0x00 - 0xFF).
4. Set OE to “0”, and BS1 to “0”. The EEPROM Data byte can now be read at DATA.
5. Set OE to “1”.
The algorithm for programming the Fuse Low bits is as follows (refer to
on page 237
1. A: Load Command “0100 0000”.
2. C: Load Data Low Byte. Bit n = “0” programs and bit n = “1” erases the Fuse bit.
3. Set BS1 to “0” and BS2 to “0”. This selects low data byte.
4. Give WR a negative pulse and wait for RDY/BSY to go high.
RESET +12V
for details on Command and Address loading):
RDY/BSY
PAGEL
XTAL1
DATA
for details on Command and Address loading):
for details on Command and Data loading):
XA1
XA0
BS1
BS2
WR
OE
0x11
A
ADDR. HIGH
G
ADDR. LOW
B
DATA
C
XX
E
ADDR. LOW
B
DATA
C
K
XX
E
“Programming the Flash” on
L
“Programming the Flash”
“Programming the Flash”
2513K–AVR–07/09

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