DSPIC30F5013-20I/PT Microchip Technology, DSPIC30F5013-20I/PT Datasheet - Page 209

• Manufacturer Part Number: DSPIC30F5013-20I/PT
• Description: IC DSPIC MCU/DSP 66K 80TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F5013-20I/PT

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 66KB (22K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 80-TFQFP
• Core Frequency: 40MHz
• Core Supply Voltage: 5.5V
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 68
• Flash Memory Size: 66KB
• Supply Voltage Range: 2.5V To 5.5V
• Package: 80TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 2.5|3.3|5 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 68
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 16-chx12-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300024 - KIT DEMO DSPICDEM 1.1XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPDM300004-2 - BOARD DEMO DSPICDEM.NET 2DM300004-1 - BOARD DEMO DSPICDEM.NET 1AC30F007 - MODULE SKT FOR DSPIC30F 80TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: DSPIC30F501320IPT

APPENDIX A:
Revision F (May 2006)
Previous versions of this data sheet contained
Advance or Preliminary Information. They were distrib-
uted with incomplete characterization data.
Revision F of this document reflects the following
updates:
• Supported I
• ADC Conversion Clock selection to allow 200 kHz
• Operating Current (Idd) Specifications
• BOR voltage limits
• I/O pin Input Specifications
• Watchdog Timer time-out limits
Revision G (January 2007)
This revision includes updates to the packaging
diagrams.
© 2011 Microchip Technology Inc.
(see
sampling rate (see
to-Digital Converter (ADC) Module”
(see
(see
(see
(see
Table
Table
Table
Table
Table
15-1)
23-5)
23-11)
23-8)
23-21)
2
C Slave Addresses
Section 19.0 “12-bit Analog-
REVISION HISTORY
Revision H (March 2008)
This revision includes the following updates:
• Added FUSE Configuration Register (FICD)
• Updated FGS Configuration register details (see
• Removed erroneous statement regarding genera-
• Electrical Specifications:
• Additional minor corrections throughout the
details (see
Registers”
Table
tion of CAN receive errors (see
“Receive
- Resolved TBD values for parameters DO10,
- 10-bit High-Speed ADC t
- Parameter OS65 (Internal RC Accuracy) has
- Parameter DC12 (RAM Data Retention Volt-
- Parameter D134 (Erase/Write Cycle Time)
- Removed parameters OS62 (Internal FRC
- Parameter OS63 (Internal FRC Accuracy)
- Updated Min and Max values and Conditions
document
dsPIC30F5011/5013
DO16, DO20, and DO26 (see
ter (time to stabilize) has been updated from
20 µs typical to 20 µs maximum (see
Table
been expanded to reflect multiple Min and
Max values for different temperatures (see
Table
age) has been updated to include a Min value
(see
has been updated to include Min and Max
values and the Typ value has been removed
(see
Jitter) and OS64 (Internal FRC Drift) and
Note 2 from AC Characteristics (see
Table
has been expanded to reflect multiple Min
and Max values for different temperatures
(see
for parameter SY11 and updated Min, Typ,
and Max values and Conditions for parame-
ter SY20 (see
20-8)
Table
Table
Table
23-39)
23-19)
23-18)
Errors”)
Section 20.7 “Device Configuration
and
23-4)
23-12)
23-18)
Table
Table
20-8)
23-21)
PDU
timing parame-
Section 17.4.5
Table
DS70116J-page 209
23-9)