AT91SAM7L64-CU Atmel, AT91SAM7L64-CU Datasheet - Page 512

• Manufacturer Part Number: AT91SAM7L64-CU
• Description: MCU ARM7 64K HS FLASH 144-LFBGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7L64-CU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 36MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 80
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 1.55 V ~ 1.8 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LFBGA
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 6 KB
• Interface Type: 2-Wire, SPI, USART
• Maximum Clock Frequency: 36 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7L-EK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• For Use With: AT91SAM7L-STK - KIT EVAL FOR AT91SAM7LAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.7.5
Name:
Access:
Reset Value: 0x00000000
• DISPMODE: Display Mode Register
(Taken into account from the next begin of frame.)
• LCDBLKFREQ: LCD Blinking Frequency Selection
(Taken into account from the next begin of frame.)
Blinking frequency = Frame Frequency/LCDBLKFREQ[7:0].
Note:
512
DISPMODE2
31
23
15
–
–
7
–
0 written in LCDBLKFREQ stops blinking.
AT91SAM7L128/64 Preliminary
0
0
0
0
1
1
1
1
SLCDC Display Register
SLCDC_DR
Read-write
30
22
14
–
–
6
–
DISPMODE1
0
0
1
1
0
0
1
1
29
21
13
–
–
5
–
DISPMODE0
28
20
12
–
–
4
–
LCDBLKFREQ
0
1
0
1
0
1
0
1
27
19
11
–
–
3
–
Display Mode
Normal Mode:
Latched data are displayed.
Force Off Mode:
All pixels are invisible. (The SLCDC memory is
unchanged.)
Force On Mode
All pixels are visible. (The SLCDC memory is unchanged.)
Blinking Mode:
All pixels are alternately turned off to the predefined state
in SLCDC memory at LCDBLKFREQ frequency. (The
SLCDC memory is unchanged.)
Inverted Mode:
All pixels are set in the inverted state as defined in SLCDC
memory. (The SLCDC memory is unchanged.)
Inverted Blinking Mode:
All pixels are alternately turned off to the predefined
opposite state in SLCDC memory at LCDBLKFREQ
frequency. (The SLCDC memory is unchanged.)
User Buffer Only Load Mode:
Blocks the automatic transfer from User Buffer to Display
Buffer.
Buffer Swap Mode:
All pixels are alternatively assigned to the state defined in
the User Buffer, then to the state defined in the Display
Buffer at LCDBLKFREQ frequency.
26
18
10
–
–
2
DISPMODE
25
17
–
–
9
1
6257A–ATARM–20-Feb-08
24
16
–
–
8
0