P89V51RD2FA,512 NXP Semiconductors, P89V51RD2FA,512 Datasheet - Page 41

IC 80C51 MCU FLASH 64K 44-PLCC

P89V51RD2FA,512

Manufacturer Part Number
P89V51RD2FA,512
Description
IC 80C51 MCU FLASH 64K 44-PLCC
Manufacturer
NXP Semiconductors
Series
89Vr
Datasheet

Specifications of P89V51RD2FA,512

Program Memory Type
FLASH
Program Memory Size
64KB (64K x 8)
Package / Case
44-PLCC
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89V5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1017 - BOARD 44-ZIF PLCC SOCKET622-1001 - USB IN-CIRCUIT PROG 80C51ISP
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1290-5
935276046512
P89V51RD2FA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89V51RD2FA,512
Manufacturer:
Freescale
Quantity:
312
Part Number:
P89V51RD2FA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
P89V51RB2_RC2_RD2_5
Product data sheet
The following examples will help to show the versatility of this scheme.
Example 1, slave 0:
Example 2, slave 1:
In the above example SADDR is the same and the SADEN data is used to differentiate
between the two slaves. Slave 0 requires a ‘0’ in bit 0 and it ignores bit 1. Slave 1 requires
a ‘0’ in bit 1 and bit 0 is ignored. A unique address for Slave 0 would be 1100 0010 since
slave 1 requires a ‘0’ in bit 1. A unique address for slave 1 would be 1100 0001 since a ‘1’
in bit 0 will exclude slave 0. Both slaves can be selected at the same time by an address
which has bit 0 = 0 (for slave 0) and bit 1 = 0 (for slave 1). Thus, both could be addressed
with 1100 0000.
SADDR = 1100 0000
--------------------------------------------------- -
SADDR = 1100 0000
--------------------------------------------------- -
SADEN = 1111 1101
SADEN = 1111 1110
Fig 16. Schemes used by the UART to detect ‘given’ and ‘broadcast’ addresses when
Given = 1100 00X0
Given = 1100 000X
multiprocessor communications is enabled
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
saddr(7)
saddr(0)
saddr(7)
saddr(0)
Rev. 05 — 12 November 2009
logic used by UART to detect 'given address' in received data
logic used by UART to detect 'given address' in received data
rx_byte(7)
rx_byte(0)
saden(7)
saden(0)
.
.
.
.
.
.
P89V51RB2/RC2/RD2
8-bit microcontrollers with 80C51 core
given_address_match
broadcast_address_match
002aaa527
© NXP B.V. 2009. All rights reserved.
41 of 80
(4)
(5)

Related parts for P89V51RD2FA,512