Z16F2810FI20SG Zilog, Z16F2810FI20SG Datasheet - Page 155

IC ZNEO MCU FLASH 128K 80QFP

Z16F2810FI20SG

Manufacturer Part Number
Z16F2810FI20SG
Description
IC ZNEO MCU FLASH 128K 80QFP
Manufacturer
Zilog
Series
Encore!® ZNEOr
Datasheet

Specifications of Z16F2810FI20SG

Core Processor
ZNEO
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
60
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
80-BQFP
Processor Series
Z16F2x
Core
Zneo
Data Bus Width
16 bit
Data Ram Size
4 B
Interface Type
ESPI, I2C, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
60
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Development Tools By Supplier
Z16F2800100ZCOG
Minimum Operating Temperature
0 C
On-chip Adc
10 bit, 12 Channel
For Use With
770-1003 - ISP 4PORT FOR ZILOG ZNEO MCU269-4537 - DEV KIT FOR Z16F ZNEO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4567

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
Z16F2810FI20SG
Manufacturer:
Zilog
Quantity:
211
Part Number:
Z16F2810FI20SG
Manufacturer:
Zilog
Quantity:
10 000
PS022008-0810
Receiving Data using the Interrupt-Driven Method
4. Write to the LIN-UART Control 0 register to:
5. Check the
6. Read data from the LIN-UART receive data register. If operating in
7. Return to Step 5 to receive additional data.
The LIN-UART receiver interrupt indicates the availability of new data (as well as error
conditions). Follow the steps below to configure the LIN-UART receiver for interrupt-
driven operation:
1. Write to the LIN-UART baud rate high and low byte registers to set the appropriate
2. Enable the LIN-UART pin functions by configuring the associated GPIO port pins for
3. Execute a
4. Write to the interrupt control registers to enable the LIN-UART receiver interrupt and
5. Clear the LIN-UART receiver interrupt in the applicable interrupt request register.
6. Write to the LIN-UART control 1 register to enable MULTIPROCESSOR (9-bit)
7. Write the device address to the address compare register (automatic multiprocessor
(a) Set the receive enable bit (REN) to enable the LIN-UART for data reception
(b) Enable parity, if MULTIPROCESSOR mode is not enabled, and select either even
register contains a valid data byte (indicated by a 1). If RDA is set to 1 to indicate
available data, continue to Step 6. If the receive data register is empty (indicated 
by 0), continue to monitor the
MULTIPROCESSOR (9-bit) mode, further actions are required depending on the
MULTIPROCESSOR mode bits
baud rate.
alternate function operation.
set the appropriate priority.
mode functions:
(a) Set the MULTIPROCESSOR mode select (MPEN) to enable
(b) Set the MULTIPROCESSOR mode bits, MPMD[1:0], to select the appropriate
(c) Configure the LIN-UART to interrupt on received data and errors or errors only
modes only).
or odd parity.
MULTIPROCESSOR mode.
address matching scheme.
(interrupt on errors only is unlikely to be useful for ZNEO devices without a
DMA block).
DI
RDA
instruction to disable interrupts.
bit in the LIN-UART Status 0 register to determine if the receive data
P R E L I M I N A R Y
RDA
MPMD
bit awaiting reception of the valid data.
[1:0].
Product Specification
ZNEO
Z16F Series
LIN-UART
139

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