HD64F3687GFPV Renesas Electronics America, HD64F3687GFPV Datasheet - Page 61

IC H8 MCU FLASH 56K 64LQFP

HD64F3687GFPV

Manufacturer Part Number
HD64F3687GFPV
Description
IC H8 MCU FLASH 56K 64LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300H Tinyr
Datasheets

Specifications of HD64F3687GFPV

Core Processor
H8/300H
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, SCI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
56KB (56K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-LQFP
Package
64LQFP
Family Name
H8
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
16|32 Bit
Number Of Programmable I/os
45
Interface Type
I2C/SCI
On-chip Adc
8-chx10-bit
Number Of Timers
3
For Use With
R0K436079S000BE - KIT DEV FOR H8/36079 W/COMPILER
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3687GFPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Part Number:
HD64F3687GFPV
Manufacturer:
RENESAS
Quantity:
1 000
2.2.2 ADDS
Notes
ADDS (ADD with Sign extension)
Operation
Rd + 1
Rd + 2
Rd + 4
Assembly-Language Format
ADDS #1, ERd
ADDS #2, ERd
ADDS #4, ERd
Operand Size
Longword
Description
This instruction adds the immediate value 1, 2, or 4 to the contents of a 32-bit register ERd.
Differing from the ADD instruction, it does not affect the condition code flags.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Register direct
Register direct
Register direct
Addressing
Mode
ERd
ERd
ERd
Mnemonic
ADDS
ADDS
ADDS
Operands
#1, ERd
#2, ERd
#4, ERd
1st byte
0
0
0
B
B
B
Condition Code
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.
2nd byte
0
8
9
Instruction Format
— —
I
Rev. 3.00 Dec 13, 2004 page 45 of 258
0 erd
0 erd
0 erd
UI
Section 2 Instruction Descriptions
H
3rd byte
Add Binary Address Data
U
— — — —
N
4th byte
REJ09B0213-0300
Z
V
States
No. of
C
2
2
2

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