HD64F38024DV Renesas Electronics America, HD64F38024DV Datasheet - Page 107

IC H8/SLP MCU FLASH 80QFP

HD64F38024DV

Manufacturer Part Number
HD64F38024DV
Description
IC H8/SLP MCU FLASH 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300L SLPr
Datasheets

Specifications of HD64F38024DV

Core Processor
H8/300L
Core Size
8-Bit
Speed
10MHz
Connectivity
SCI
Peripherals
LCD, PWM, WDT
Number Of I /o
51
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F38024DV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
2.2.47
Operation
Rd (shifted arithmetic left )
Assembly-Language Format
SHAL Rd
Operand Size
Byte
Description
This instruction shifts an 8-bit general register one bit to the left. The most significant bit shifts
into the carry flag, and the least significant bit is cleared to 0.
The operation is shown schematically below.
The SHAL instruction is identical to the SHLL instruction except for its effect on the overflow
(V) flag.
Instruction Formats and Number of Execution States
Register direct
Addressing
mode
C
SHAL (shift arithmetic left)
Bit 7
MSB
SHAL
Mnem.
Rd
Operands
Rd
LSB
Bit 0
Condition Code
I: Previous value remains unchanged.
H: Previous value remains unchanged.
N: Set to 1 when the result is negative;
Z: Set to 1 when the result is zero;
V: Set to 1 when an overflow occurs;
C: Receives the previous value in bit 7.
otherwise cleared to 0.
otherwise cleared to 0.
otherwise cleared to 0.
1st byte
1
0
— —
0
I
2nd byte
8
Instruction code
Rev. 2.00 Dec 27, 2004 page 93 of 128
H
rd
3rd byte
N
Section 2 Instruction Set
Z
V
4th byte
REJ09B0214-0200
C
No. of
states
SHAL
2

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