MC908JL16CPE Freescale Semiconductor, MC908JL16CPE Datasheet - Page 152

• Manufacturer Part Number: MC908JL16CPE
• Description: IC MCU 16K FLASH 8MHZ 28-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908JL16CPE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, SCI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 23
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.600", 15.24mm)
• Controller Family/series: HC08
• No. Of I/o's: 23
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI
• Rohs Compliant: Yes
• Processor Series: HC08JL
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Development Tools By Supplier: FSICEBASE, DEMO908JL16E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• For Use With: DEMO908JL16E - BOARD DEMO FOR MC908JL16
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

External Interrupt (IRQ)
The vector fetch or software clear may occur before or after the interrupt pin returns to logic one. As long
as the pin is low, the interrupt request remains pending. A reset will clear the latch and the MODE control
bit, thereby clearing the interrupt even if the pin stays low.
When set, the IMASK bit in the INTSCR mask all external interrupt requests. A latched interrupt request
is not presented to the interrupt priority logic unless the IMASK bit is clear.
152
$001D
Addr.
IRQPUD
IRQ
IRQ Status and Control
Register Name
The interrupt mask (I) in the condition code register (CCR) masks all
interrupt requests, including external interrupt requests. (See
Control.)
DECODER
VECTOR
FETCH
RESET
ACK
V
DD
INTERNAL
PULLUP
DEVICE
(INTSCR)
Register
Reset:
Read:
Write:
Figure 11-1. IRQ Module Block Diagram
Figure 11-2. IRQ I/O Register Summary
V
MODE
DD
Bit 7
MC68HC908JL16 Data Sheet, Rev. 1.1
0
0
D
CK
CLR
Q
= Unimplemented
6
0
0
NOTE
5
0
0
IMASK
SYNCHRONIZER
4
0
0
VOLTAGE
DETECT
HIGH
IRQF
3
0
4.5 Exception
ACK
2
0
0
IRQF
Freescale Semiconductor
IMASK
1
0
TO CPU FOR
BIL/BIH
INSTRUCTIONS
IRQ
INTERRUPT
REQUEST
TO MODE
SELECT
LOGIC
MODE
Bit 0
0