C8051F369-GM Silicon Laboratories Inc, C8051F369-GM Datasheet - Page 156

• Manufacturer Part Number: C8051F369-GM
• Description: IC 8051 MCU 16K FLASH 28-QFN
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F36xr

Specifications of C8051F369-GM

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 28-QFN
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 50MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 25
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 17x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: I2C/SMBus/SPI/UART
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 25
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F360DK
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 21-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• A/d Bit Size: 10 bit
• A/d Channels Available: 21
• Height: 0.83 mm
• Length: 5 mm
• Supply Voltage (max): 3.6 V
• Supply Voltage (min): 2.7 V
• Width: 5 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 770-1006 - ISP 4PORT FOR SILABS C8051F MCU336-1410 - KIT DEV FOR C8051F360 FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 336-1651

C8051F360/1/2/3/4/5/6/7/8/9
156
Bits 7–5: UNUSED. Read = 000b. Write = don’t care.
Bit 4:
Bits 3–2: EMD1–0: EMIF Operating Mode Select.
Bits 1–0: EALE1–0: ALE Pulse-Width Select Bits (only has effect when EMD2 = 0).
SFR Page:
SFR Address:
R/W
Bit7
–
EMD2: EMIF Multiplex Mode Select.
0: EMIF operates in multiplexed address/data mode.
1: EMIF operates in non-multiplexed mode (separate address and data pins).
These bits control the operating mode of the External Memory Interface.
00: Internal Only: MOVX accesses on-chip XRAM only. All effective addresses alias to
01: Split Mode without Bank Select: Accesses below the 1 k boundary are directed on-chip.
10: Split Mode with Bank Select: Accesses below the 1 k boundary are directed on-chip.
11: External Only: MOVX accesses off-chip XRAM only. On-chip XRAM is not visible to the
00: ALE high and ALE low pulse width = 1 SYSCLK cycle.
01: ALE high and ALE low pulse width = 2 SYSCLK cycles.
10: ALE high and ALE low pulse width = 3 SYSCLK cycles.
11: ALE high and ALE low pulse width = 4 SYSCLK cycles.
F
0xC7
SFR Definition 15.2. EMI0CF: External Memory Configuration
on-chip memory space.
Accesses above the 1 k boundary are directed off-chip. 8-bit off-chip MOVX operations
use the current contents of the Address High port latches to resolve upper address byte.
Note that in order to access off-chip space, EMI0CN must be set to a page that is not
contained in the on-chip address space.
Accesses above the 1 k boundary are directed off-chip. 8-bit off-chip MOVX operations
use the contents of EMI0CN to determine the high-byte of the address.
CPU.
R/W
Bit6
–
R/W
Bit5
–
EMD2
R/W
Bit4
Rev. 1.0
EMD1
R/W
Bit3
EMD0
R/W
Bit2
EALE1
R/W
Bit1
EALE0
R/W
Bit0
00000011
Reset Value