HD64F3437TFI16V Renesas Electronics America, HD64F3437TFI16V Datasheet - Page 175

• Manufacturer Part Number: HD64F3437TFI16V
• Description: MCU FLASH 60K 100-TQFP
• Manufacturer: Renesas Electronics America

Specifications of HD64F3437TFI16V

• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Port 9 Data Direction Register (P9DDR)
Modes 1 and 2
Mode 3
P9DDR is an 8-bit register that controls the input/output direction of each pin in port 9. A pin
functions as an output pin if the corresponding P9DDR bit is set to 1, and as an input pin if this bit
is cleared to 0. In modes 1 and 2, P9
P9DDR is a write-only register. Read data is invalid. If read, all bits always read 1.
P9DDR is initialized by a reset and in hardware standby mode. The initial value is H'40 in modes
1 and 2, and H'00 in mode 3. In software standby mode P9DDR retains its existing values, so if a
transition to software standby mode occurs while a P9DDR bit is set to 1, the corresponding pin
remains in the output state.
Port 9 Data Register (P9DR)
Note: * Determined by the level at pin P9
P9DR is an 8-bit register that stores data for pins P9
9 is read, the value in P9DR is obtained directly, regardless of the actual pin state, except for P9
When a P9DDR bit is cleared to 0, if port 9 is read the pin state is obtained. This also applies to
pins used by on-chip supporting modules and for bus control signals. P9
state.
P9DR pins other than P9
standby mode it retains its existing values.
Bit
Initial value
Read/Write
Initial value
Read/Write
Bit
Initial value
Read/Write
P9
R/W
P9
7
W
W
7
DDR P9
0
0
7
0
7
6
are initialized to 0 by a reset and in hardware standby mode. In software
P9
—*
6
—
W
6
DDR P9
1
0
6
R
6
6
DDR is fixed at 1 and cannot be modified.
R/W
P9
5
6
W
W
5
DDR P9
0
0
5
0
.
5
R/W
P9
4
W
W
4
DDR P9
0
0
4
0
7
to P9
4
0
. When a P9DDR bit is set to 1, if port
R/W
P9
3
W
W
3
DDR P9
0
0
3
0
3
R/W
P9
2
6
W
W
2
DDR P9
0
0
2
0
always returns the pin
2
R/W
P9
1
W
W
1
DDR P9
0
0
1
0
1
R/W
P9
0
W
W
0
DDR
0
0
0
0
0
143
6
.