ATTINY25-20SH Atmel, ATTINY25-20SH Datasheet - Page 82

• Manufacturer Part Number: ATTINY25-20SH
• Description: IC MCU AVR 2KB FLASH 20MHZ 8SOIC
• Manufacturer: Atmel
• Series: AVR® ATtinyr

Specifications of ATTINY25-20SH

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 6
• Program Memory Size: 2KB (1K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• Processor Series: ATtiny
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 128 B
• Interface Type: SPI, USI
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 6
• Number Of Timers: 2
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

11.9.3
82
ATtiny25/45/85
TCCR0B – Timer/Counter Control Register B
Table 11-5.
Notes:
• Bit 7 – FOC0A: Force Output Compare A
The FOC0A bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0A bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0A output is
changed according to its COM0A[1:0] bits setting. Note that the FOC0A bit is implemented as a
strobe. Therefore it is the value present in the COM0A[1:0] bits that determines the effect of the
forced compare.
A FOC0A strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0A as TOP.
The FOC0A bit is always read as zero.
• Bit 6 – FOC0B: Force Output Compare B
The FOC0B bit is only active when the WGM bits specify a non-PWM mode.
However, for ensuring compatibility with future devices, this bit must be set to zero when
TCCR0B is written when operating in PWM mode. When writing a logical one to the FOC0B bit,
an immediate Compare Match is forced on the Waveform Generation unit. The OC0B output is
changed according to its COM0B[1:0] bits setting. Note that the FOC0B bit is implemented as a
strobe. Therefore it is the value present in the COM0B[1:0] bits that determines the effect of the
forced compare.
A FOC0B strobe will not generate any interrupt, nor will it clear the timer in CTC mode using
OCR0B as TOP.
Bit
0x33
Read/Write
Initial Value
Mode
0
1
2
3
4
5
6
7
1. MAX
2. BOTTOM = 0x00
WGM
02
0
0
0
0
1
1
1
1
Waveform Generation Mode Bit Description
FOC0A
W
7
0
WGM
01
= 0xFF
0
0
1
1
0
0
1
1
FOC0B
W
6
0
WGM
00
0
1
0
1
0
1
0
1
Timer/Counter Mode
of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
Reserved
PWM, Phase Correct
Reserved
Fast PWM
R
5
–
0
R
4
–
0
WGM02
R/W
3
0
OCRA
OCRA
OCRA
0xFF
0xFF
0xFF
TOP
CS02
R/W
–
–
2
0
BOTTOM
BOTTOM
Update of
Immediate
Immediate
OCRx at
CS01
R/W
1
0
TOP
TOP
–
–
(2)
(2)
CS00
R/W
0
0
2586M–AVR–07/10
BOTTOM
BOTTOM
TOV Flag
Set on
MAX
MAX
MAX
TOP
TCCR0B
–
–
(1)
(1)
(1)
(2)
(2)