PIC12C671T-04E/SM Microchip Technology, PIC12C671T-04E/SM Datasheet - Page 491

• Manufacturer Part Number: PIC12C671T-04E/SM
• Description: IC MCU OTP 1KX14 A/D 8-SOIJ
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C671T-04E/SM

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 1.75KB (1K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
• For Use With: AC164312 - MODULE SKT FOR PM3 16SOIC309-1048 - ADAPTER 8-SOIC TO 8-DIP309-1047 - ADAPTER 8-SOIC TO 8-DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

Section 26. Watchdog Timer and Sleep Mode
26.4
26.4.1
1997 Microchip Technology Inc.
Wake-up from SLEEP
SLEEP (Power-Down) Mode
Sleep (Power-down) mode is a mode where the device is placed in it’s lowest current consump-
tion state. The device oscillator is turned off, so no system clocks are occurring in the device.
Sleep mode is entered by executing a
If enabled, the Watchdog Timer will be cleared but keeps running, the PD bit in the STATUS reg-
ister is cleared, the TO bit is set, and the oscillator driver is turned off. The I/O ports maintain the
status they had, before the
For lowest current consumption in this mode, all I/O pins should be either at V
external circuitry drawing current from the I/O pin and the modules that are specified to have a
delta sleep current should be disabled. I/O pins that are hi-impedance inputs should be pulled
high or low externally to avoid switching currents caused by floating inputs. The T0CKI input
should also be at V
pull-ups on PORTB should be considered.
The MCLR pin must be at a logic high level (V
Some features of the device that consume a delta sleep current are enabled / disabled by device
configuration bits. These include the Watchdog Timer (WDT) and Brown-out Reset (BOR) cir-
cuitry modules.
The device can wake-up from SLEEP through one of the following events:
1.
2.
3.
The first event will reset the device upon wake-up. However the latter two events will wake the
device and then resume program execution. The TO and PD bits in the STATUS register can be
used to determine the cause of device reset. The PD bit, which is set on power-up is cleared
when SLEEP is invoked. The TO bit is cleared if WDT wake-up occurred.
When the
the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be
set (enabled). Wake-up is regardless of the state of the GIE bit. If the GIE bit is clear (disabled),
the device continues execution at the instruction after the
(enabled), the device executes the instruction after the
the interrupt address (0004h). In cases where the execution of the instruction following
is not desirable, the user should have an
Any device reset.
Watchdog Timer Wake-up (if WDT was enabled).
Any peripheral module which can set its interrupt flag while in sleep, such as:
- External INT pin
- Change on port pin
- Comparators
- A/D
- Timer1
- LCD
- SSP
- Capture
SLEEP
instruction is being executed, the next instruction (PC + 1) is pre-fetched. For
DD
or V
SLEEP
SS
for lowest current consumption. The contribution from on-chip
instruction was executed (driving high, low, or hi-impedance).
SLEEP
NOP
IHMC
after the
instruction.
).
SLEEP
SLEEP
SLEEP
instruction and then branches to
instruction.
instruction. If the GIE bit is set
DS31026A-page 26-7
DD
, or V
SS
, with no
SLEEP
26