DSPIC33FJ64GS606T-I/MR Microchip Technology, DSPIC33FJ64GS606T-I/MR Datasheet - Page 72

• Manufacturer Part Number: DSPIC33FJ64GS606T-I/MR
• Description: MCU/DSP 16BIT 64KB FLASH 64QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ64GS606T-I/MR

• Program Memory Type: FLASH
• Program Memory Size: 64KB (64K x 8)
• Package / Case: 64-VFQFN, Exposed Pad
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, QEI, POR, PWM, WDT
• Number Of I /o: 58
• Ram Size: 9K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Numeric And Arithmetic Format: Fixed-Point or Floating-Point
• Instruction Set Architecture: Harvard
• Device Million Instructions Per Second: 40 MIPs
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 58
• Data Ram Size: 4 KB
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Interface Type: I2C, SPI, UART
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• On-chip Dac: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

TABLE 4-13:
TABLE 4-14:
TABLE 4-15:
OC1RS
OC1R
OC1CON
OC2RS
OC2R
OC2CON
OC3RS
OC3R
OC3CON
OC4RS
OC4R
OC4CON
Legend:
QEI1CON
DFLT1CON
POS1CNT
MAX1CNT
Legend:
QEI2CON
DFLT2CON
POS2CNT
MAX2CNT
Legend:
Name
SFR
Name
Name
SFR
SFR
u = uninitialized bit, — = unimplemented, read as ‘0’
u = uninitialized bit, — = unimplemented, read as ‘0’
Addr
0180
0182
0184
0186
0188
018A
018C
018E
0190
0192
0194
0196
SFR
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr.
Addr.
01E0
01E2
01E4
01E6
01F0
01F2
01F4
01F6
OUTPUT COMPARE REGISTER MAP
QEI1 REGISTER MAP
QEI2 REGISTER MAP
Bit 15
CNTERR
CNTERR
—
—
—
—
Bit 15
Bit 15
—
—
Bit 14
—
—
—
—
Bit 14
Bit 14
—
—
—
—
OCSIDL
OCSIDL
OCSIDL
OCSIDL
Bit 13
QEISIDL
QEISIDL
Bit 13
Bit 13
—
—
Bit 12
Bit 12
Bit 12
INDX
INDX
—
—
—
—
—
—
UPDN
UPDN
Bit 11
Bit 11
Bit 11
—
—
—
—
—
—
Bit 10
Bit 10
IMV<1:0>
IMV<1:0>
Bit 10
QEIM<2:0>
QEIM<2:0>
—
—
—
—
Bit 9
Bit 9
Output Compare 1 Secondary Register
Output Compare 2 Secondary Register
Output Compare 3 Secondary Register
Output Compare 4 Secondary Register
Bit 9
Bit 8
CEID
CEID
Bit 8
—
—
—
—
Output Compare 1 Register
Output Compare 2 Register
Output Compare 3 Register
Output Compare 4 Register
Position Counter<15:0>
Maximum Count<15:0>
Position Counter<15:0>
Maximum Count<15:0>
SWPAB
QEOUT
SWPAB
QEOUT
Bit 7
Bit 7
Bit 8
—
—
—
—
PCDOUT
PCDOUT
Bit 6
Bit 6
Bit 7
—
—
—
—
QECK<2:0>
QECK<2:0>
TQGATE
TQGATE
Bit 6
Bit 5
Bit 5
—
—
—
—
Bit 5
—
—
—
—
Bit 4
Bit 4
TQCKPS<1:0>
TQCKPS<1:0>
OCFLT
OCFLT
OCFLT
OCFLT
Bit 4
Bit 3
Bit 3
—
—
OCTSEL
OCTSEL
OCTSEL
OCTSEL
Bit 3
POSRES
POSRES
Bit 2
Bit 2
—
—
Bit 2
TQCS
TQCS
Bit 1
Bit 1
—
—
OCM<2:0>
OCM<2:0>
OCM<2:0>
OCM<2:0>
Bit 1
UPDN_SRC
UPDN_SRC
Bit 0
Bit 0
—
—
Bit 0
Resets
Resets
Resets
0000
0000
0000
FFFF
0000
0000
0000
FFFF
xxxx
xxxx
0000
xxxx
xxxx
0000
xxxx
xxxx
0000
xxxx
xxxx
0000
All
All
All