PIC16C72-04I/SO Microchip Technology, PIC16C72-04I/SO Datasheet
PIC16C72-04I/SO
Specifications of PIC16C72-04I/SO
Related parts for PIC16C72-04I/SO
PIC16C72-04I/SO Summary of contents
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... Power saving SLEEP mode • Selectable oscillator options • Low-power, high-speed CMOS technology • Fully static design • Wide operating voltage range: - 2.5V to 6.0V (PIC16C72) - 2.5V to 5.5V (PIC16CR72) • High Sink/Source Current 25/25 mA • Commercial, Industrial and Extended temperature ranges • ...
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... Special Features of the CPU...................................................................................................................................................... 59 11.0 Instruction Set Summary ............................................................................................................................................................ 73 12.0 Development Support................................................................................................................................................................. 75 13.0 Electrical Characteristics - PIC16C72 Series ............................................................................................................................. 77 14.0 DC and AC Characteristics Graphs and Tables - PIC16C72 ..................................................................................................... 97 15.0 DC and AC Characteristics Graphs and Tables - PIC16CR72 ................................................................................................ 107 16.0 Packaging Information.............................................................................................................................................................. 109 Appendix A: What’s New in this Data Sheet .................................................................................................................................. 115 Appendix B: What’ ...
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... The PIC16C72 belongs to the Mid-Range family of the PICmicro devices. A block diagram of the device is shown in Figure 1-1. FIGURE 1-1: PIC16C72/CR72 BLOCK DIAGRAM ...
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... PIC16C72 Series TABLE 1-1 PIC16C72/CR72 PINOUT DESCRIPTION I/O/P Pin Name Pin# Type OSC1/CLKIN 9 I OSC2/CLKOUT I/P MCLR/V PP RA0/AN0 2 I/O RA1/AN1 3 I/O RA2/AN2 4 I/O RA3/AN3/V 5 I/O REF RA4/T0CKI 6 I/O RA5/SS/AN4 7 I/O RB0/INT 21 I/O RB1 22 I/O RB2 23 I/O RB3 24 I/O RB4 25 I/O RB5 ...
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... MEMORY ORGANIZATION There are two memory blocks in PIC16C72 Series devices. These are the program memory and the data memory. Each block has its own bus, so that access to both blocks can occur during the same oscillator cycle. The data memory can further be broken down into the general purpose RAM and the Special Function Registers (SFRs) ...
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... PIC16C72 Series 2.2 Data Memory Organization The data memory is partitioned into multiple banks which contain the General Purpose Registers and the Special Function Registers. Bits RP1 and RP0 are the bank select bits. RP1* RP0 (STATUS<6:5> Bank0 = 01 Bank1 = 10 Bank2 (not implemented) ...
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... Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset. 4: The IRP and RP1 bits are reserved on the PIC16C72/CR72. Always maintain these bits clear. 5: SSPSTAT<7:6> are not implemented on the PIC16C72, read as '0'. ...
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... Other (non power-up) resets include external reset through MCLR and Watchdog Timer Reset. 4: The IRP and RP1 bits are reserved on the PIC16C72/CR72. Always maintain these bits clear. 5: SSPSTAT<7:6> are not implemented on the PIC16C72, read as '0'. ...
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... For rotate (RRF, RLF) instructions, this bit is loaded with either the high or low order bit of the source register. 1998 Microchip Technology Inc. PIC16C72 Series It is recommended, therefore, that only BCF, BSF, SWAPF and MOVWF instructions are used to alter the STATUS register because these instructions do not affect the bits from the STATUS register ...
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... PIC16C72 Series 2.2.2.2 OPTION_REG REGISTER The OPTION_REG register is a readable and writable register which contains various control bits to configure the TMR0 prescaler/WDT postscaler (single assign- able register known also as the prescaler), the External INT Interrupt, TMR0, and the weak pull-ups on PORTB. ...
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... RBIF: RB Port Change Interrupt Flag bit least one of the RB7:RB4 pins changed state (must be cleared in software None of the RB7:RB4 pins have changed state 1998 Microchip Technology Inc. PIC16C72 Series Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... PIC16C72 Series 2.2.2.4 PIE1 REGISTER This register contains the individual enable bits for the peripheral interrupts. FIGURE 2-6: PIE1 REGISTER (ADDRESS 8Ch) U-0 R/W-0 U-0 U-0 — ADIE — — bit7 bit 7: Unimplemented: Read as '0' bit 6: ADIE: A/D Converter Interrupt Enable bit ...
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... TMR1IF: TMR1 Overflow Interrupt Flag bit 1 = TMR1 register overflowed (must be cleared in software TMR1 register did not overflow 1998 Microchip Technology Inc. PIC16C72 Series Note: Interrupt flag bits get set when an interrupt condition occurs regardless of the state of its corresponding enable bit or the global enable bit, GIE (INTCON< ...
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... PIC16C72 Series 2.2.2.6 PCON REGISTER The Power Control (PCON) register contains a flag bit to allow differentiation between a Power-on Reset (POR external MCLR Reset or WDT Reset. Those devices with brown-out detection circuitry con- tain an additional bit to differentiate a Brown-out Reset condition from a Power-on Reset condition. ...
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... PC PCLATH Note: PCLATH is not updated with the contents of PCH. 1998 Microchip Technology Inc. PIC16C72 Series Figure 2-9 shows the four situations for the loading of the PC. Example 1 shows how the PC is loaded on a write to PCL (PCLATH<4:0> shows how the PC is loaded during a GOTO instruction (PCLATH< ...
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... Therefore, PCLATH<4:3> bits are not required for the return instructions (which POPs the address from the stack). Note: PIC16C72 Series devices ignore paging bit PCLATH<4>. The use of PCLATH<4> general purpose read/write bit is not recommended since this may affect upward compatibility with future products. ...
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... EXAMPLE 2-2: movlw movwf NEXT clrf incf btfss goto CONTINUE : An effective 9-bit address is obtained by concatenating the 8-bit FSR register and the IRP bit (STATUS<7>), as shown in Figure 2-11. However, IRP is not used in the PIC16C72 Series. 0 IRP (2) bank select 80h 100h 180h not used ...
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... PIC16C72 Series NOTES: DS39016A-page 18 Preliminary 1998 Microchip Technology Inc. ...
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... Select Bank 1 MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISA ; Set RA<3:0> as inputs ; RA<5:4> as outputs ; TRISA<7:6> are always ; read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 3-1: BLOCK DIAGRAM OF RA3:RA0 AND RA5 PINS Data bus Port CK Q Data Latch ...
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... PIC16C72 Series TABLE 3-1 PORTA FUNCTIONS Name Bit# Buffer Function RA0/AN0 bit0 TTL Input/output or analog input RA1/AN1 bit1 TTL Input/output or analog input RA2/AN2 bit2 TTL Input/output or analog input RA3/AN3/V bit3 TTL Input/output or analog input or V REF RA4/T0CKI bit4 ST Input/output or external clock input for Timer0 ...
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... To enable weak pull-ups, set the appropriate TRIS bit(s) and clear the RBPU bit (OPTION<7>). 1998 Microchip Technology Inc. PIC16C72 Series Four of PORTB’s pins, RB7:RB4, have an interrupt on change feature. Only pins configured as inputs can cause this interrupt to occur (i.e. any RB7:RB4 pin con- fi ...
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... PIC16C72 Series TABLE 3-3 PORTB FUNCTIONS Name Bit# Buffer (1) RB0/INT bit0 TTL/ST RB1 bit1 TTL RB2 bit2 TTL RB3 bit3 TTL RB4 bit4 TTL RB5 bit5 TTL (2) RB6 bit6 TTL/ST (2) RB7 bit7 TTL/ST Legend: TTL = TTL input Schmitt Trigger input Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt. ...
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... STATUS, RP0 ; Select Bank 1 MOVLW 0xCF ; Value used to ; initialize data ; direction MOVWF TRISC ; Set RC<3:0> as inputs ; RC<5:4> as outputs ; RC<7:6> as inputs 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 3-5: PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE) (2) PORT/PERIPHERAL Select Peripheral Data Out 0 Data bus ...
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... PIC16C72 Series TABLE 3-5 PORTC FUNCTIONS Name Bit# Buffer Type bit0 RC0/T1OSO/T1CKI ST RC1/T1OSI bit1 ST RC2/CCP1 bit2 ST RC3/SCK/SCL bit3 ST RC4/SDI/SDA bit4 ST RC5/SDO bit5 ST RC6 bit6 ST RC7 bit7 ST Legend Schmitt Trigger input TABLE 3-6 SUMMARY OF REGISTERS ASSOCIATED WITH PORTC Address Name Bit 7 Bit 6 ...
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... T0CS Note 1: T0CS, T0SE, PSA, PS2:PS0 (OPTION_REG<5:0>). 2: The prescaler is shared with Watchdog Timer (refer to Figure 4-2 for detailed block diagram). 1998 Microchip Technology Inc. PIC16C72 Series Additional information on external clock requirements is available in the PICmicro™ Mid-Range MCU Refer- ence Manual, DS33023. ...
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... PIC16C72 Series 4.2.1 SWITCHING PRESCALER ASSIGNMENT The prescaler assignment is fully under software con- trol, i.e., it can be changed “on the fly” during program execution. Note: To avoid an unintended device RESET, a specific instruction sequence (shown in the PICmicro™ Mid-Range MCU Reference Manual, DS3023) must be executed when changing the prescaler assignment from Timer0 to the WDT ...
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... Internal clock (F /4) OSC bit 0: TMR1ON: Timer1 On bit 1 = Enables Timer1 0 = Stops Timer1 1998 Microchip Technology Inc. PIC16C72 Series 5.1 Timer1 Operation Timer1 can operate in one of these modes: • timer • synchronous counter • asynchronous counter The operating mode is determined by the clock select bit, TMR1CS (T1CON< ...
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... PIC16C72 Series FIGURE 5-2: TIMER1 BLOCK DIAGRAM Set flag bit TMR1IF on Overflow TMR1 TMR1H T1OSC RC0/T1OSO/T1CKI RC1/T1OSI Note 1: When the T1OSCEN bit is cleared, the inverter and feedback resistor are turned off. This eliminates power drain. DS39016A-page 28 0 TMR1L 1 TMR1ON T1SYNC ...
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... Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by the Timer1 module. Note 1: These bits are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 5.3 Timer1 Interrupt The TMR1 Register pair (TMR1H:TMR1L) increments from 0000h to FFFFh and rolls over to 0000h. The TMR1 Interrupt, if enabled, is generated on overfl ...
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... PIC16C72 Series NOTES: DS39016A-page 30 Preliminary 1998 Microchip Technology Inc. ...
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... Reset, MCLR reset, Watchdog Timer reset, or Brown-out Reset) TMR2 is not cleared when T2CON is written. 1998 Microchip Technology Inc. PIC16C72 Series 6.2 Timer2 Interrupt The Timer2 module has an 8-bit period register PR2. Timer2 increments from 00h until it matches PR2 and then resets to 00h on the next increment cycle ...
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... PIC16C72 Series FIGURE 6-2: T2CON: TIMER2 CONTROL REGISTER (ADDRESS 12h) U-0 R/W-0 R/W-0 R/W-0 — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 bit7 bit 7: Unimplemented: Read as '0' bit 6-3: TOUTPS3:TOUTPS0: Timer2 Output Postscale Select bits 0000 = 1:1 Postscale 0001 = 1:2 Postscale • ...
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... Compare mode, trigger special event (CCP1IF bit is set; CCP1 resets TMR1 and starts an A/D conversion (if A/D module is enabled)) 11xx = PWM mode 1998 Microchip Technology Inc. PIC16C72 Series Additional information on the CCP module is available in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. ...
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... PIC16C72 Series 7.1 Capture Mode In Capture mode, CCPR1H:CCPR1L captures the 16-bit value of the TMR1 register when an event occurs on pin RC2/CCP1. An event is defined as: • every falling edge • every rising edge • every 4th rising edge • every 16th rising edge An event is selected by control bits CCP1M3:CCP1M0 (CCP1CON< ...
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... Shaded cells are not used by Capture and Timer1. Note 1: These bits/registers are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 7.2.1 CCP PIN CONFIGURATION The user must configure the RC2/CCP1 pin as an out- put by clearing the TRISC<2> bit. ...
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... PIC16C72 Series 7.3 PWM Mode In Pulse Width Modulation (PWM) mode, the CCP1 pin produces 10-bit resolution PWM output. Since the CCP1 pin is multiplexed with the PORTC data latch, the TRISC<2> bit must be cleared to make the CCP1 pin an output. Note: Clearing the CCP1CON register will force the CCP1 PWM output latch to the default low level ...
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... Legend unknown unchanged unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. Note 1: These bits/registers are unimplemented, read as '0'. 1998 Microchip Technology Inc. PIC16C72 Series 3. Make the CCP1 pin an output by clearing the TRISC<2> bit. 4. Set the TMR2 prescale value and enable Timer2 by writing to T2CON ...
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... PIC16C72 Series NOTES: DS39016A-page 38 Preliminary 1998 Microchip Technology Inc. ...
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... C) 2 The SSP module mode works the same in all PIC16C72 series devices that have an SSP module. However the SSP Module in SPI mode has differences between the PIC16C72 and the PIC16CR72 device. The register definitions and operational description of SPI mode has been split into two sections because of the differences between the PIC16C72 and the PIC16CR72 device ...
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... PIC16C72 Series 8.2 SPI Mode for PIC16C72 This section contains register definitions and opera- tional characteristics of the SPI module on the PIC16C72 device only. FIGURE 8-1: SSPSTAT: SYNC SERIAL PORT STATUS REGISTER (ADDRESS 94h) (PIC16C72) U-0 U-0 R-0 R-0 — — D/A ...
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... FIGURE 8-2: SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h) (PIC16C72) R/W-0 R/W-0 R/W-0 R/W-0 WCOL SSPOV SSPEN CKP bit7 bit 7: WCOL: Write Collision Detect bit 1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared in software collision bit 6: SSPOV: Receive Overfl ...
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... PIC16C72 Series 8.2.1 OPERATION OF SSP MODULE IN SPI MODE - PIC16C72 A block diagram of the SSP Module in SPI Mode is shown in Figure 8-3. The SPI mode allows 8-bits of data to be synchro- nously transmitted and received simultaneously. To accomplish communication, typically three pins are used: • Serial Data Out (SDO) RC5/SDO • ...
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... Receive not complete, SSPBUF is empty 2 Transmit (I C mode only Transmit in progress, SSPBUF is full 0 = Transmit complete, SSPBUF is empty 1998 Microchip Technology Inc. PIC16C72 Series Additional information on SPI operation may be found in the PICmicro™ Mid-Range MCU Reference Manual, DS33023. R-0 R-0 R-0 R-0 ...
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... PIC16C72 Series FIGURE 8-5: SSPCON: SYNC SERIAL PORT CONTROL REGISTER (ADDRESS 14h) (PIC16CR72) R/W-0 R/W-0 R/W-0 R/W-0 WCOL SSPOV SSPEN CKP bit7 bit 7: WCOL: Write Collision Detect bit 1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared in software) ...
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... SPI module will reset if the SS pin is set Note: If the SPI is used in Slave Mode with CKE = '1', then the SS pin control must be enabled. 1998 Microchip Technology Inc. PIC16C72 Series FIGURE 8-6: SSP BLOCK DIAGRAM (SPI MODE)(PIC16CR72) Read SSPBUF reg SSPSR reg RC4/SDI/SDA bit0 ...
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... PIC16C72 Series TABLE 8-2 REGISTERS ASSOCIATED WITH SPI OPERATION (PIC16CR72) Address Name Bit 7 Bit 6 0Bh,8Bh INTCON GIE PEIE (1) 0Ch PIR1 ADIF (1) 8Ch PIE1 ADIE 87h TRISC PORTC Data Direction Register 13h SSPBUF Synchronous Serial Port Receive Buffer/Transmit Register 14h SSPCON WCOL ...
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... Serial Receive/Transmit Buffer (SSPBUF) • SSP Shift Register (SSPSR) - Not directly acces- sible • SSP Address Register (SSPADD) 1998 Microchip Technology Inc. PIC16C72 Series The SSPCON register allows control of the I tion. Four mode selection bits (SSPCON<3:0>) allow one of the following I 2 • ...
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... PIC16C72 Series 8.4.1.1 ADDRESSING Once the SSP module has been enabled, it waits for a START condition to occur. Following the START condi- tion, the 8-bits are shifted into the SSPSR register. All incoming bits are sampled with the rising edge of the clock (SCL) line. The value of register SSPSR<7:1> is compared to the value of the SSPADD register ...
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... S SSPIF (PIR1<3>) BF (SSPSTAT<0>) SSPOV (SSPCON<6>) 1998 Microchip Technology Inc. PIC16C72 Series When the address byte overflow condition exists, then no acknowledge (ACK) pulse is given. An overflow con- dition is defined as either bit BF (SSPSTAT<0>) is set or bit SSPOV (SSPCON<6>) is set. An SSP interrupt is generated for each data transfer byte. Flag bit SSPIF (PIR1< ...
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... PIC16C72 Series 8.4.1.3 TRANSMISSION When the R/W bit of the incoming address byte is set and an address match occurs, the R/W bit of the SSPSTAT register is set. The received address is loaded into the SSPBUF register. The ACK pulse will be sent on the ninth bit, and pin RC3/SCK/SCL is held low ...
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... Legend unknown unchanged unimplemented locations read as '0'. Shaded cells are not used by SSP module in SPI mode. Note 1: These bits are unimplemented, read as '0'. 2: The SMP and CKE bits are implemented on the PIC16CR72 only. On the PIC16C72, these two bits are unimplemented, read as '0'. 1998 Microchip Technology Inc. ...
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... PIC16C72 Series NOTES: DS39016A-page 52 Preliminary 1998 Microchip Technology Inc. ...
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... ANALOG-TO-DIGITAL CONVERTER (A/D) MODULE The analog-to-digital (A/D) converter module has five inputs for the PIC16C72/R72. The A/D allows conversion of an analog input signal to a corresponding 8-bit digital number (refer to Applica- tion Note AN546 for use of A/D Converter). The output of the sample and hold is the input into the converter, which generates the result via successive approxima- tion ...
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... PIC16C72 Series FIGURE 9-2: ADCON1 REGISTER (ADDRESS 9Fh) U-0 U-0 U-0 U-0 — — — — bit7 bit 7-3: Unimplemented: Read as '0' bit 2-0: PCFG2:PCFG0: A/D Port Configuration Control bits PCFG2:PCFG0 RA0 A 000 A 001 A 010 A 011 A 100 A 101 D 11x A = Analog input ...
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... Turn on A/D module (ADCON0) FIGURE 9-3: A/D BLOCK DIAGRAM A/D Converter V REF (Reference voltage) 1998 Microchip Technology Inc. PIC16C72 Series 2. Configure A/D interrupt (if desired): • Clear ADIF bit • Set ADIE bit • Set GIE bit 3. Wait the required acquisition time. 4. Start conversion: • ...
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... PIC16C72 Series 9.1 A/D Acquisition Requirements For the A/D converter to meet its specified accuracy, the charge holding capacitor (C ) must be allowed HOLD to fully charge to the input channel voltage level. The analog input model is shown in Figure 9-4. The source impedance (R ) and the internal sampling switch (R ...
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... When device frequency is greater than 1 MHz, the RC A/D conversion clock source is recommended for sleep operation only. 5: For extended voltage devices (LC), please refer to Electrical Specifications section. 1998 Microchip Technology Inc. PIC16C72 Series 9.3 Configuring Analog Port Pins . The The ADCON1, TRISA, and TRISE registers control the AD operation of the A/D port pins ...
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... PIC16C72 Series 9.4 A/D Conversions Note: The GO/DONE bit should NOT be set in the same instruction that turns on the A/D. 9.5 Use of the CCP Trigger An A/D conversion can be started by the “special event trigger” of the CCP1 module. This requires that the CCP1M3:CCP1M0 bits (CCP1CON<3:0>) be pro- grammed as 1011 and that the A/D module is enabled (ADON bit is set) ...
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... SPECIAL FEATURES OF THE CPU The PIC16C72 series has a host of such features intended to maximize system reliability, minimize cost through elimination of external components, provide power saving operating modes and offer code protec- tion. These are: • Oscillator selection • Reset - Power-on Reset (POR) ...
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... PIC16C72 Series 10.2 Oscillator Configurations 10.2.1 OSCILLATOR TYPES The PIC16CXXX family can be operated in four differ- ent oscillator modes. The user can program two config- uration bits (FOSC1 and FOSC0) to select one of these four modes: • LP Low Power Crystal • XT Crystal/Resonator • ...
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... A simplified block diagram of the on-chip reset circuit is PIC16CXXX shown in Figure 10-5. The PIC16C72/CR72 have a MCLR noise filter in the MCLR reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. ...
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... PIC16C72 Series FIGURE 10-5: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT External Reset MCLR SLEEP WDT WDT Module Time-out Reset V rise DD detect Power-on Reset V DD Brown-out Reset BODEN OST/PWRT OST 10-bit Ripple counter OSC1 (1) PWRT On-chip 10-bit Ripple counter RC OSC Note 1: This is a separate oscillator from the RC oscillator of the CLKIN pin. ...
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... C in the event of MCLR/V PP down due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 1998 Microchip Technology Inc. PIC16C72 Series 10.5 Power-up Timer (PWRT) The Power-up Timer provides a fixed 72 ms nominal time-out on power-up only, from the POR. The Power- up Timer operates on an internal RC oscillator. The chip is kept in reset as long as the PWRT is active. The PWRT’ ...
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... PIC16C72 Series 10.8 Time-out Sequence On power-up the time-out sequence is as follows: First PWRT time-out is invoked after the POR time delay has expired. Then OST is activated. The total time-out will vary based on oscillator configuration and the status of the PWRT. For example mode with the PWRT disabled, there will be no time-out at all ...
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... When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 10-5 for reset value for specific condition. 1998 Microchip Technology Inc. PIC16C72 Series MCLR Resets WDT Reset uuuu uuuu ...
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... PIC16C72 Series FIGURE 10-7: TIME-OUT SEQUENCE ON POWER-UP (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 10-8: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET FIGURE 10-9: TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO V ...
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... FIGURE 10-10: SLOW RISE TIME (MCLR TIED MCLR INTERNAL POR PWRT TIME-OUT OST TIME-OUT INTERNAL RESET 1998 Microchip Technology Inc. PIC16C72 Series ) PWRT T OST Preliminary DS39016A-page 67 ...
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... PIC16C72 Series 10.10 Interrupts The PIC16C72/CR72 has 8 sources of interrupt. The interrupt control register (INTCON) records individual interrupt requests in flag bits. It also has individual and global interrupt enable bits. Note: Individual interrupt flag bits are set regard- less of the status of their corresponding mask bit or the GIE bit. A global interrupt enable bit, GIE (INTCON< ...
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... Service Routine (ISR) - user defined : SWAPF STATUS_TEMP,W MOVWF STATUS SWAPF W_TEMP,F SWAPF W_TEMP,W 1998 Microchip Technology Inc. PIC16C72 Series The example: a) Stores the W register. b) Stores the STATUS register in bank 0. c) Executes the ISR code. d) Restores the STATUS register (and bank select bit). ...
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... PIC16C72 Series 10.12 Watchdog Timer (WDT) The Watchdog Timer free running on-chip RC oscillator which does not require any external compo- nents. This RC oscillator is separate from the RC oscil- lator of the OSC1/CLKIN pin. That means that the WDT will run, even if the clock on the OSC1/CLKIN and OSC2/CLKOUT pins of the device has been stopped, for example, by execution of a SLEEP instruction ...
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... Special event trigger (Timer1 in asynchronous mode using an external clock). 1998 Microchip Technology Inc. PIC16C72 Series Other peripherals cannot generate interrupts since dur- ing SLEEP, no on-chip clocks are present. When the SLEEP instruction is being executed, the next instruction ( pre-fetched. For the device to wake-up through an interrupt event, the corresponding interrupt enable bit must be set (enabled) ...
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... PIC16C72 Series FIGURE 10-14: WAKE-UP FROM SLEEP THROUGH INTERRUPT OSC1 CLKOUT(4) INT pin INTF flag (INTCON<1>) GIE bit (INTCON<7>) INSTRUCTION FLOW PC PC PC+1 Instruction Inst( Inst(PC) = SLEEP fetched Instruction SLEEP Inst( executed Note 1: XT oscillator mode assumed 1024T (drawing not to scale) This delay will not be there for RC osc mode. ...
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... If a conditional test is true or the program counter is changed as a result of an instruc- tion, the instruction execution time 1998 Microchip Technology Inc. PIC16C72 Series Table 11-2 lists the instructions recognized by the MPASM assembler. Figure 11-1 shows the general formats that the instruc- tions can have ...
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... PIC16C72 Series TABLE 11-2 PIC16CXXX INSTRUCTION SET Mnemonic, Description Operands BYTE-ORIENTED FILE REGISTER OPERATIONS ADDWF f, d Add W and f ANDWF f, d AND W with f CLRF f Clear f CLRW - Clear W COMF f, d Complement f DECF f, d Decrement f DECFSZ f, d Decrement f, Skip if 0 INCF f, d Increment f INCFSZ ...
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... Some of the features include a RS-232 inter- face, push-button switches, a potentiometer for simu- lated analog input, a Serial EEPROM to demonstrate 2 usage of the I C bus and separate headers for connec- tion to an LCD module and a keypad. 1998 Microchip Technology Inc. PIC16C72 Series Preliminary DS39016A-page 75 ...
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... PIC16C72 Series NOTES: DS39016A-page 76 Preliminary 1998 Microchip Technology Inc. ...
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... ELECTRICAL CHARACTERISTICS - PIC16C72 SERIES Absolute Maximum Ratings † Parameter Ambient temperature under bias Storage temperature Voltage on any pin with respect Voltage on V with respect Voltage on MCLR with respect Voltage on RA4 with respect to Vss Total power dissipation (Note 2) Maximum current out of V ...
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... PIC16C72 Series TABLE 13-1 CROSS REFERENCE OF DEVICE SPECS (PIC16C72) FOR OSCILLATOR CONFIGURATIONS AND FREQUENCIES OF OPERATION (COMMERCIAL DEVICES) OSC PIC16C72-04 PIC16C72- 4. 4. max 2.7 mA typ max 1.5 A typ Freq: 4 MHz max. Freq: 4 MHz max 4. 4.5V to 5.5V ...
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... DC Characteristics: PIC16C72/CR72-04 (Commercial, Industrial, Extended) PIC16C72/CR72-10 (Commercial, Industrial, Extended) PIC16C72/CR72-20 (Commercial, Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature DC CHARACTERISTICS Param Characteristic Sym No. D001 Supply Voltage V DD D001A D002* RAM Data Retention V DR Voltage (Note 1) D003 V start voltage to ...
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... PIC16C72 Series 13.2 DC Characteristics: PIC16LC72/LCR72-04 (Commercial, Industrial) Standard Operating Conditions (unless otherwise stated) DC CHARACTERISTICS Operating temperature Param Characteristic Sym No. D001 Supply Voltage V DD D002* RAM Data Retention V DR Voltage (Note 1) D003 V start voltage POR ensure internal Power- on Reset signal D004* V rise rate to ensure ...
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... DC Characteristics: PIC16C72/CR72-04 (Commercial, Industrial, Extended) PIC16C72/CR72-10 (Commercial, Industrial, Extended) PIC16C72/CR72-20 (Commercial, Industrial, Extended) PIC16LC72/LCR72-04 (Commercial, Industrial) DC CHARACTERISTICS Param Characteristic No. Input Low Voltage I/O ports D030 with TTL buffer D030A D031 with Schmitt Trigger buffer D032 MCLR, OSC1 (in RC mode) D033 ...
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... Units Conditions -3.0 mA 4. -2.5 mA 4.5V - +125 -1.3 mA 4. -1.0 mA 4.5V - +125 C V RA4 pin, PIC16C72/LC72 V RA4 pin, PIC16CR72/LCR72 pF In XT, HS and LP modes when external clock is used to drive OSC1 1998 Microchip Technology Inc. ...
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... I C only AA output access BUF Bus free specifications only Hold ST DAT DATA input hold STA START condition FIGURE 13-1: LOAD CONDITIONS Load condition 1 V Pin R = 464 1998 Microchip Technology Inc. PIC16C72 Series osc High Low SU STO Load condition Pin V SS ...
Page 84
... PIC16C72 Series 13.5 Timing Diagrams and Specifications FIGURE 13-2: EXTERNAL CLOCK TIMING Q4 OSC1 CLKOUT TABLE 13-3 EXTERNAL CLOCK TIMING REQUIREMENTS Parameter Sym Characteristic No. Fosc External CLKIN Frequency (Note 1) Oscillator Frequency (Note 1) 1 Tosc External CLKIN Period (Note 1) Oscillator Period (Note 1) ...
Page 85
... Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. †† These parameters are asynchronous events not related to any internal clock edges. Note 1: Measurements are taken in RC Mode where CLKOUT output 1998 Microchip Technology Inc. PIC16C72 Series ...
Page 86
... PIC16C72 Series FIGURE 13-4: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND POWER-UP TIMER TIMING V DD MCLR Internal POR 33 PWRT Time-out 32 OSC Time-out Internal RESET Watchdog Timer RESET I/O Pins Note: Refer to Figure 13-1 for load conditions. FIGURE 13-5: BROWN-OUT RESET TIMING ...
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... TCKEZtmr1 Delay from external clock edge to timer increment * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25˚C unless otherwise stated. These parameters are for design guidance only and are not tested. 1998 Microchip Technology Inc. PIC16C72 Series Min Typ† ...
Page 88
... Note: Refer to Figure 13-1 for load conditions. TABLE 13-7 CAPTURE/COMPARE/PWM REQUIREMENTS (CCP1) Param Sym Characteristic No. 50* TccL CCP1 input low time No Prescaler With Prescaler PIC16C72/CR72 51* TccH CCP1 input high time No Prescaler With Prescaler PIC16C72/CR72 52* TccP CCP1 input period 53* TccR CCP1 output rise time 54* TccF ...
Page 89
... Refer to Figure 13-1 for load conditions. FIGURE 13-9: SPI MASTER OPERATION TIMING (CKE = SCK (CKP = SCK (CKP = 1) MSB SDO SDI MSB IN 74 Refer to Figure 13-1 for load conditions. 1998 Microchip Technology Inc. PIC16C72 Series BIT6 - - - - - -1 MSB 75, 76 BIT6 - - - - BIT6 - - - - - -1 LSB 75, 76 BIT6 - - - -1 LSB IN Preliminary ...
Page 90
... PIC16C72 Series FIGURE 13-10: SPI SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) 80 SDO SDI SDI MSB IN 73 Refer to Figure 13-1 for load conditions. FIGURE 13-11: SPI SLAVE MODE TIMING (CKE = SCK (CKP = 0) 71 SCK (CKP = 1) MSB SDO SDI ...
Page 91
... TABLE 13-8 SPI SLAVE MODE REQUIREMENTS (CKE=0) - PIC16C72 Param Sym Characteristic No. TssL2scH SCK or SCK input 70 TssL2scL TscH SCK input high time (slave mode) 71 TscL SCK input low time (slave mode) 72 TdiV2scH, Setup time of SDI data input to SCK edge 73 TdiV2scL TscH2diL, Hold time of SDI data input to SCK edge ...
Page 92
... PIC16C72 Series 2 FIGURE 13-12 BUS START/STOP BITS TIMING SCL 91 90 SDA START Condition Note: Refer to Figure 13-1 for load conditions 2 TABLE 13- BUS START/STOP BITS REQUIREMENTS Parameter Sym Characteristic No START condition SU STA 90 Setup time START condition HD STA Hold time STOP condition SU STO ...
Page 93
... SCL signal. If such a device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line T max.+tsu;DAT = 1000 + 250 = 1250 ns (according to the standard-mode I R released. 1998 Microchip Technology Inc. PIC16C72 Series 100 101 106 107 109 ...
Page 94
... PIC16C72 Series TABLE 13-12 A/D CONVERTER CHARACTERISTICS: PIC16C72/CR72-04 (Commercial, Industrial, Extended) PIC16C72/CR72-10 (Commercial, Industrial, Extended) PIC16C72/CR72-20 (Commercial, Industrial, Extended) PIC16LC72/LCR72-04 (Commercial, Industrial) Param Sym Characteristic No. A01 N Resolution R A02 E Total Absolute error ABS A03 E Integral linearity error IL A04 E Differential linearity error DL A05 ...
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... SAMPLE Note 1: If the A/D clock source is selected as RC, a time of T SLEEP instruction to be executed. TABLE 13-13 A/D CONVERSION REQUIREMENTS Param Sym Characteristic No. T A/D clock period PIC16C72/LCR72 130 AD PIC16LC72/LCR72 PIC16C72/LCR72 PIC16LC72/LCR72 131 T Conversion time CNV (not including S/H time) (Note 1) ...
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... PIC16C72 Series NOTES: DS39016A-page 96 Preliminary 1998 Microchip Technology Inc. ...
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... DC AND AC CHARACTERISTICS GRAPHS AND TABLES - PIC16C72 The graphs and tables provided in this section are for design guidance and are not tested or guaranteed. In some graphs or tables, the data presented are outside specified operating range (i.e., outside specified V range). This is for information only and devices are guaranteed to operate properly only within the specified range. ...
Page 98
... PIC16C72 Series FIGURE 14-3: TYPICAL I vs (WDT ENABLED, RC MODE 2.5 3.0 3.5 4.0 4.5 5.0 V (Volts) DD FIGURE 14-4: MAXIMUM I vs ENABLED, RC MODE 2.5 3.0 3.5 4.0 4.5 5.0 V (Volts) DD DS39016A-page 98 PIC16C72 @ 25 C FIGURE 14-5: TYPICAL RC OSCILLATOR DD 6.0 5.5 5.0 4.5 4.0 3 ...
Page 99
... Brown-out 400 Reset 200 4.3 0 2.5 3.0 3.5 4.0 4.5 5.0 V (Volts) DD The shaded region represents the built-in hysteresis of the brown-out reset circuitry. 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 BROWN- FIGURE 14-10: TYPICAL 5.5 6.0 0 2.5 3.0 DD FIGURE 14-11: MAXIMUM I ...
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... PIC16C72 Series FIGURE 14-12: TYPICAL I vs. FREQUENCY (RC MODE @ 22 pF 2000 1800 1600 1400 1200 1000 800 600 400 200 0 0.0 0.5 1.0 FIGURE 14-13: MAXIMUM I vs. FREQUENCY (RC MODE @ 22 pF, - 2000 1800 1600 1400 1200 1000 800 600 400 200 0 0.0 0.5 1 ...
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... FREQUENCY (RC MODE @ 100 pF, - 1600 1400 1200 1000 800 600 400 200 0 0 200 400 Shaded area is beyond recommended range 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 600 800 1000 1200 Frequency (kHz) 600 800 1000 1200 Frequency (kHz) Preliminary 6.0V 5.5V 5.0V 4.5V 4 ...
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... PIC16C72 Series FIGURE 14-16: TYPICAL I vs. FREQUENCY (RC MODE @ 300 pF 1200 1000 800 600 400 200 0 0 100 FIGURE 14-17: MAXIMUM I vs. FREQUENCY (RC MODE @ 300 pF, - 1200 1000 800 600 400 200 0 0 100 DS39016A-page 102 PIC16C72 200 300 400 500 Frequency (kHz) ...
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... The percentage variation indicated here is part to part variation due to normal process distribution. The variation indicated is 3 standard deviation from average value for V = 5V. DD 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 FIGURE 14-19: TRANSCONDUCTANCE(gm) 4.0 3.5 5.0V 3.0 4.0V 2.5 2 ...
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... PIC16C72 Series FIGURE 14-22: TYPICAL XTAL STARTUP TIME vs. V (LP MODE 3.5 3.0 2.5 2.0 32 kHz, 33 pF/33 pF 1.5 1.0 0.5 200 kHz, 15 pF/15 pF 0.0 2.5 3.0 3.5 4.0 4.5 5.0 V (Volts) DD FIGURE 14-23: TYPICAL XTAL STARTUP TIME vs. V (HS MODE MHz, 33 pF/ MHz, 33 pF/33 pF ...
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... Frequency (kHz) 1998 Microchip Technology Inc. PIC16C72 Series PIC16C72 FIGURE 14-27: TYPICAL I 1800 1600 1400 1200 1000 800 600 400 150 200 200 0 0.0 0.4 0.8 FIGURE 14-28: MAXIMUM I 1800 1600 ...
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... PIC16C72 Series FIGURE 14-29: TYPICAL I vs. FREQUENCY DD (HS MODE 7.0 6.0 5.0 4.0 3.0 6.0V 2.0 5.5V 5.0V 1.0 4.5V 4.0V 0 Frequency (MHz) TABLE 14-3 TYPICAL EPROM ERASE TIME RECOMMENDATIONS Process Wavelength Technology (Angstroms) 57K 2537 77K 2537 90K 2537 120K 2537 Note 1: If these criteria are not met, the erase times will be different ...
Page 107
... DC AND AC CHARACTERISTICS GRAPHS AND TABLES - PIC16CR72 NO GRAPHS OR TABLES AVAILABLE AT THIS TIME 1998 Microchip Technology Inc. PIC16C72 Series PIC16CR72 Preliminary DS39016A-page 107 ...
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... PIC16C72 Series NOTES: DS39016A-page 108 PIC16CR72 Preliminary 1998 Microchip Technology Inc. ...
Page 109
... For OTP marking beyond this, certain price adders apply. Please check with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP price. 1998 Microchip Technology Inc. PIC16C72 Series Example Example PIC16C72-04/SP ...
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... PIC16C72 Series 16.2 28-Lead Ceramic Side Brazed Dual In-Line with Window (300 mil)(JW Units Dimension Limits PCB Row Spacing Number of Pins Pitch Lower Lead Width Upper Lead Width Shoulder Radius Lead Thickness Top to Seating Plane Top of Lead to Seating Plane Base to Seating Plane ...
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... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” 1998 Microchip Technology Inc. PIC16C72 Series ...
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... PIC16C72 Series 16.4 28-Lead Plastic Surface Mount (SOIC - Wide, 300 mil Body) (SO Units Dimension Limits Pitch p Number of Pins n Overall Pack. Height A Shoulder Height A1 Standoff A2 ‡ Molded Package Length D ‡ Molded Package Width E Outside Dimension E1 Chamfer Distance X Shoulder Radius R1 Gull Wing Radius ...
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... Dimensions “D” and “E” do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.010” (0.254 mm) per side or 0.020” (0.508 mm) more than dimensions “D” or “E.” 1998 Microchip Technology Inc. PIC16C72 Series ...
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... PIC16C72 Series NOTES: DS39016A-page 114 Preliminary 1998 Microchip Technology Inc. ...
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... APPENDIX A: WHAT’S NEW IN THIS DATA SHEET This is a new data sheet. However, information on the PIC16C72 device was previously found in the PIC16C7X Data Sheet, DS30390. Information on the PIC16CR72 device is new. APPENDIX B: WHAT’S CHANGED IN THIS DATA SHEET New data sheet. 1998 Microchip Technology Inc. ...
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... PIC16C72 Series NOTES: DS39016A-page 116 Preliminary 1998 Microchip Technology Inc. ...
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... Initializing PORTA ..................................................... 19 Initializing PORTB ..................................................... 21 Initializing PORTC ..................................................... 23 Code Protection ........................................................... 59, 72 Configuration Bits .............................................................. 59 D D/A ............................................................................... 40, 43 Data/Address bit, D/A .................................................. 40 bit ....................................................................................9 DC Characteristics PIC16C72 .................................................................. 79 Development Support ........................................................ 75 Development Tools ............................................................ 75 Direct Addressing .............................................................. 17 E Electrical Characteristics PIC16C72 .................................................................. 77 External Power-on Reset Circuit ....................................... 63 F FSR Register ............................................................. Fuzzy Logic Dev. System ( fuzzy TECH -MP) ................... 75 G GIE bit ...
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... RC5/SDO ..................................................................... 4 RC6 ............................................................................. 4 RC7 ............................................................................. 4 SCK ..................................................................... 42–?? SDI ....................................................................... 42–?? SDO ..................................................................... 42–?? SS ........................................................................ 42–?? Vdd .............................................................................. 4 Vss ............................................................................... 4 Pinout Descriptions PIC16C72 .................................................................... 4 PIC16CR72 ................................................................. 4 PIR1 Register .................................................................... 13 POR ............................................................................. 63, 64 Oscillator Start-up Timer (OST) ........................... 59, 63 Power Control Register (PCON) ................................ 64 Power-on Reset (POR) ........................................ 59, 65 Power-up Timer (PWRT) ........................................... 59 Power-Up-Timer (PWRT) .......................................... 63 Time-out Sequence ................................................... 64 TO ...
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... SDI ..................................................................................... 42 SDO ................................................................................... 42 Slave Mode SCL ............................................................................ 47 SDA ............................................................................ 47 SLEEP ......................................................................... 59, 61 SMP ................................................................................... 43 Special Event Trigger ......................................................... 58 Special Features of the CPU ............................................. 59 Special Function Registers PIC16C72 .................................................................... 7 PIC16CR72 .................................................................. 7 Special Function Registers, Section .................................... 7 SPI Block Diagram ...................................................... 42, 45 Mode .......................................................................... 42 Serial Clock ................................................................ 45 Serial Data In ............................................................. 45 Serial Data Out .......................................................... 45 Slave Select ............................................................... 45 SPI Mode ................................................................... 45 SSPCON ...
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... PIC16C72 Series Timing Diagrams A/D Conversion .......................................................... 95 Brown-out Reset ........................................................ 86 Capture/Compare/PWM ............................................. 88 CLKOUT and I/O ........................................................ 85 External Clock Timing ................................................ Bus Data .............................................................. Bus Start/Stop bits ............................................... Reception (7-bit Address) .................................... 49 Power-up Timer ......................................................... 86 Reset .......................................................................... 86 Start-up Timer ............................................................ 86 Timer0 ........................................................................ 87 Timer1 ........................................................................ 87 Wake-up from Sleep via Interrupt .............................. 72 Watchdog Timer ......................................................... 86 TMR1CS bit ........................................................................ 27 TMR1H Register .................................................................. 7 TMR1IE bit ...
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... Conferences for products, Development Systems, technical information and more • Listing of seminars and events 1998 Microchip Technology Inc. PIC16C72 Series Systems Information and Upgrade Hot Line The Systems Information and Upgrade Line provides system users a listing of the latest versions of all of Microchip's development systems software products ...
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... Telephone: (_______) _________ - _________ Application (optional): Would you like a reply? Y Device: PIC16C72 Series Questions: 1. What are the best features of this document? 2. How does this document meet your hardware and software development needs you find the organization of this data sheet easy to follow? If not, why? 4 ...
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... BBS or WWW site can be found in the On-Line Support section of this data sheet.) 1998 Microchip Technology Inc. PIC16C72 Series /XX XXX Examples: Package Pattern f) PIC16C72 -04/P 301 = Commercial temp., PDIP package, 4 MHz, normal V pattern #301. g) PIC16LC72 - 04I/SO = Industrial temp., SOIC package, 200 kHz, Extended V (2) h) PIC16CR72 - 10I/P = ROM program memory, (2) Industrial temp ...
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... Serialized Quick Turn Programming (SQTP service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system ...
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... Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-334-8870 Fax: 65-334-8850 Taiwan Microchip Technology Taiwan 11F-3, No. 207 ...