PIC16C72-04I/SO Microchip Technology, PIC16C72-04I/SO Datasheet - Page 15

• Manufacturer Part Number: PIC16C72-04I/SO
• Description: IC MCU OTP 2KX14 A/D PWM 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C72-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 5x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• For Use With: XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

2.3
The program counter (PC) specifies the address of the
instruction to fetch for execution. The PC is 13 bits
wide. The low byte is called the PCL register. This reg-
ister is readable and writable. The high byte is called
the PCH register. This register contains the PC<12:8>
bits and is not directly readable or writable. All updates
to the PCH register go through the PCLATH register.
FIGURE 2-9:
1998 Microchip Technology Inc.
Situation 1 - Instruction with PCL as destination
Situation 2 - GOTO Instruction
Situation 3 - CALL Instruction
Situation 4 - RETURN, RETFIE, or RETLW Instruction
PCL and PCLATH
PC
PC
PC
PC
Note: PCLATH is not updated with the contents of PCH.
12
12 11 10
2
12 11 10
12 11 10
2
LOADING OF PC IN DIFFERENT SITUATIONS
5
PCH
PCLATH<4:3>
PCH
PCH
PCLATH<4:3>
PCH
PCLATH
PCLATH
PCLATH
PCLATH<4:0>
8
8
8
PCLATH
8
7
7
7
7
PCL
PCL
PCL
PCL
11
11
11
8
ALU result
0
0
0
0
13
13
Opcode <10:0>
Opcode <10:0>
Opcode <10:0>
Preliminary
Figure 2-9 shows the four situations for the loading of
the PC. Example 1 shows how the PC is loaded on a
write to PCL (PCLATH<4:0>
shows how the PC is loaded during a GOTO instruction
(PCLATH<4:3>
is loaded during a CALL instruction (PCLATH<4:3>
PCH), with the PC loaded (PUSHed) onto the Top of
Stack. Finally, example 4 shows how the PC is loaded
during one of the return instructions where the PC is
loaded (POPed) from the Top of Stack.
STACK (13-bits x 8)
STACK (13-bits x 8)
STACK (13-bits x 8)
STACK (13-bits x 8)
Top of STACK
Top of STACK
Top of STACK
Top of STACK
PIC16C72 Series
PCH). Example 3 shows how the PC
PCH). Example 2
DS39016A-page 15