PIC16C72-04I/SO Microchip Technology, PIC16C72-04I/SO Datasheet - Page 56

IC MCU OTP 2KX14 A/D PWM 28SOIC

PIC16C72-04I/SO

Manufacturer Part Number
PIC16C72-04I/SO
Description
IC MCU OTP 2KX14 A/D PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C72-04I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
PIC16C72 Series
9.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 9-4. The source
impedance (R
impedance directly affect the time required to charge
the capacitor C
impedance varies over the device voltage (V
source impedance affects the offset voltage at the ana-
log input (due to pin leakage current). The maximum
recommended impedance for analog sources is 10
k . After the analog input channel is selected
(changed) this acquisition must be done before the
conversion can be started.
FIGURE 9-4:
DS39016A-page 56
A/D Acquisition Requirements
S
) and the internal sampling switch (R
HOLD
ANALOG INPUT MODEL
Legend C
VA
. The sampling switch (R
Rs
V
I leakage
R
SS
C
T
PIN
IC
HOLD
ANx
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
various junctions
) must be allowed
V
DD
DD
). The
V
V
T
T
Preliminary
SS
SS
= 0.6V
= 0.6V
)
)
I leakage
500 nA
To calculate the minimum acquisition time, T
the PICmicro™ Mid-Range MCU Reference Manual,
DS33023. This equation calculates the acquisition time
to within 1/2 LSb error (512 steps for the A/D). The 1/2
LSb error is the maximum error allowed for the A/D to
meet its specified accuracy.
R
IC
1k
V
SS R
DD
Sampling
Switch
6V
5V
4V
3V
2V
SS
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
= DAC capacitance
= 51.2 pF
( k )
HOLD
1998 Microchip Technology Inc.
ACQ
, see

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