PIC16C72-04I/SO Microchip Technology, PIC16C72-04I/SO Datasheet - Page 69

IC MCU OTP 2KX14 A/D PWM 28SOIC

PIC16C72-04I/SO

Manufacturer Part Number
PIC16C72-04I/SO
Description
IC MCU OTP 2KX14 A/D PWM 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 16Cr

Specifications of PIC16C72-04I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MIL309-1024 - ADAPTER 28-SOIC TO 28-DIP309-1023 - ADAPTER 28-SOIC TO 28-DIP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
10.11
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt, i.e., W register and STATUS
register. This will have to be implemented in software.
Example 10-1 stores and restores the W and STATUS
registers. The register, W_TEMP, must be defined in
each bank and must be defined at the same offset from
the bank base address (i.e., if W_TEMP is defined at
0x20 in bank 0, it must also be defined at 0xA0 in bank
1).
EXAMPLE 10-1: SAVING STATUS, W, AND PCLATH REGISTERS IN RAM
1998 Microchip Technology Inc.
MOVWF
SWAPF
CLRF
MOVWF
:
:Interrupt Service Routine (ISR) - user defined
:
SWAPF
MOVWF
SWAPF
SWAPF
Context Saving During Interrupts
W_TEMP
STATUS,W
STATUS
STATUS_TEMP
STATUS_TEMP,W
STATUS
W_TEMP,F
W_TEMP,W
;Copy W to W_TEMP register, could be bank one or zero
;Swap status to be saved into W
;bank 0, regardless of current bank, Clears IRP,RP1,RP0
;Save status to bank zero STATUS_TEMP register
;Swap STATUS_TEMP register into W
;(sets bank to original state)
;Move W into STATUS register
;Swap W_TEMP
;Swap W_TEMP into W
Preliminary
The example:
a)
b)
c)
d)
e)
Stores the W register.
Stores the STATUS register in bank 0.
Executes the ISR code.
Restores the STATUS register (and bank select
bit).
Restores the W register.
PIC16C72 Series
DS39016A-page 69

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