PIC24FJ256GB206-I/MR Microchip Technology, PIC24FJ256GB206-I/MR Datasheet - Page 139

MCU PIC 16BIT FLASH 256K 64VQFN

PIC24FJ256GB206-I/MR

Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
MCU PIC 16BIT FLASH 256K 64VQFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB206-I/MR

Core Size
16-Bit
Program Memory Size
256KB (85.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
9
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
29
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
8.3
The following four Special Function Registers control
the operation of the oscillator:
• OSCCON
• CLKDIV
• OSCTUN
• REFOCON
The OSCCON register (Register 8-1) is the main con-
trol register for the oscillator. It controls clock source
switching and allows the monitoring of clock sources.
REGISTER 8-1:
 2010 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
HS = Hardware Settable bit
bit 15
bit 14-12
bit 11
bit 10-8
Note 1:
CLKLOCK
R/S-0
U-0
2:
3:
Control Registers
Reset values for these bits are determined by the FNOSC Configuration bits.
The state of the IOLOCK bit can only be changed once an unlocking sequence has been executed. In
addition, if the IOL1WAY Configuration bit is ‘1’, once the IOLOCK bit is set, it cannot be cleared.
Also resets to ‘0’ during any valid clock switch or whenever a non PLL Clock mode is selected.
R-x, HSC
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Fast RC/16 Oscillator
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Selection bits
111 = Fast RC Oscillator with Postscaler (FRCDIV)
110 = Fast RC/16 Oscillator
101 = Low-Power RC Oscillator (LPRC)
100 = Secondary Oscillator (SOSC)
011 = Primary Oscillator with PLL module (XTPLL, HSPLL, ECPLL)
010 = Primary Oscillator (XT, HS, EC)
001 = Fast RC Oscillator with Postscaler and PLL module (FRCPLL)
000 = Fast RC Oscillator (FRC)
IOLOCK
COSC2
R/W-0
OSCCON: OSCILLATOR CONTROL REGISTER
(2)
(1)
C = Clearable bit
W = Writable bit
‘1’ = Bit is set
R-x, HSC
R-0, HSC
COSC1
LOCK
(1)
(3)
R-x, HSC
COSC0
U-0
PIC24FJ256GB210 FAMILY
(1)
S = Settable bit
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/C-0, HS
(1)
U-0
CF
(1)
The CLKDIV register (Register 8-2) controls the
features associated with Doze mode, as well as the
postscaler for the FRC oscillator.
The OSCTUN register (Register 8-3) allows the user to
fine tune the FRC oscillator over a range of
approximately ±1.5%.
The REFOCON register (Register 8-5) controls the
frequency of the reference clock out.
POSCEN
R/W-x
NOSC2
R/W-0
(1)
x = Bit is unknown
HSC = Hardware Settable/Clearable bit
SOSCEN
R/W-x
NOSC1
R/W-0
(1)
DS39975A-page 139
R/W-x
OSWEN
NOSC0
R/W-0
(1)
bit 8
bit 0

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