PIC24FJ256GB206-I/MR Microchip Technology, PIC24FJ256GB206-I/MR Datasheet - Page 63

MCU PIC 16BIT FLASH 256K 64VQFN

PIC24FJ256GB206-I/MR

Manufacturer Part Number
PIC24FJ256GB206-I/MR
Description
MCU PIC 16BIT FLASH 256K 64VQFN
Manufacturer
Microchip Technology
Series
PIC® 24Fr

Specifications of PIC24FJ256GB206-I/MR

Core Size
16-Bit
Program Memory Size
256KB (85.5K x 24)
Core Processor
PIC
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
52
Program Memory Type
FLASH
Ram Size
96K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC24
No. Of I/o's
52
Ram Memory Size
96KB
Cpu Speed
32MHz
No. Of Timers
5
No. Of Pwm Channels
9
Processor Series
PIC24FJ
Core
PIC
Data Bus Width
16 bit
Data Ram Size
96 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
29
Number Of Timers
5
Operating Supply Voltage
2.2 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001, MA240021
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
TABLE 4-26:
TABLE 4-27:
PMCON1
PMCON2
PMCON3
PMCON4
PMCS1CF
PMCS1BS
PMCS1MD 060C
PMCS2CF
PMCS2BS
PMCS2MD
PMDOUT1
PMDOUT2
PMDIN1
PMDIN2
PMSTAT
Legend:
Note
ALRMVAL
ALCFGRPT
RTCVAL
RCFGCAL
Legend:
Note
Name
Name
File
File
1:
1:
Addr
060A
061A
061C
0600
0602
0604 PTWREN PTRDEN
0606
0608
060E
0610
0612
0614
0616
0618
— = unimplemented, read as ‘0’, r = Reserved. Reset values are shown in hexadecimal.
Unimplemented in 64-pin devices, read as ‘0’.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
The status of the RCFGCAL register on POR is ‘0000’ and on other Resets is unchanged.
Addr
0620
0622
0624
0626
PTEN15
BASE23
BASE23
PMPEN
ACKM1
ACKM1
CSDIS
CSDIS
Bit 15
BUSY
IBF
ENHANCED PARALLEL MASTER/SLAVE PORT REGISTER MAP
REAL-TIME CLOCK AND CALENDAR REGISTER MAP
ALRMEN
RTCEN
Bit 15
PTEN14
BASE22
BASE22
ACKM0
ACKM0
Bit 14
IBOV
CSP
CSP
CHIME
Bit 14
PTBE1EN
CSPTEN
CSPTEN
PTEN13
BASE21
BASE21
ERROR
Bit 13
PSIDL
RTCWREN RTCSYNC HALFSEC
r
r
AMASK3
Bit 13
EPMP Data Out Register 1<15:8>
EPMP Data Out Register 2<15:8>
EPMP Data In Register 1<15:8>
EPMP Data In Register 2<15:8>
ADRMUX1
TIMEOUT
PTBE0EN
PTEN12
BASE20
BASE20
Bit 12
BEP
BEP
r
r
AMASK2
Bit 12
ADRMUX0
PTEN11
BASE19
BASE19
Bit 11
IB3F
AMASK1
r
r
r
Bit 11
AWAITM1
PTEN10
BASE18
BASE18
Bit 10
WRSP
WRSP
IB2F
AMASK0
RTCOE
Bit 10
r
Alarm Value Register Window Based on ALRMPTR<1:0>
RTCC Value Register Window Based on RTCPTR<1:0>
AWAITM0
BASE17
BASE17
MODE1
PTEN9
RDSP
RDSP
ALRMPTR1 ALRMPTR0
Bit 9
IB1F
RTCPTR1
r
Bit 9
AWAITE
BASE16
BASE16
MODE0
PTEN8
Bit 8
IB0F
SM
SM
r
RTCPTR0
Bit 8
RADDR23 RADDR22 RADDR21 RADDR20 RADDR19 RADDR18 RADDR17 RADDR16
DWAITB1
DWAITB1
BASE15
BASE15
PTEN7
ACKP
ACKP
CSF1
Bit 7
OBE
ARPT7
CAL7
Bit 7
PTEN22
DWAITB0 DWAITM3
DWAITB0 DWAITM3
PTEN6
PTSZ1
PTSZ1
OBUF
CSF0
Bit 6
ARPT6
(1)
CAL6
Bit 6
PTEN21
PTEN5
PTSZ0
PTSZ0
Bit 5
ALP
ARPT5
(1)
EPMP Data Out Register 1<7:0>
EPMP Data Out Register 2<7:0>
CAL5
Bit 5
EPMP Data In Register 1<7:0>
EPMP Data In Register 2<7:0>
PTEN20
DWAITM2 DWAITM1 DWAITM0
DWAITM2 DWAITM1 DWAITM0
ALMODE
PTEN4
Bit 4
ARPT4
CAL4
Bit 4
(1)
PTEN19
BASE11
BASE11
PTEN3
OB3E
Bit 3
ARPT3
CAL3
Bit 3
(1)
BUSKEEP
PTEN18
PTEN2
OB2E
Bit 2
ARPT2
CAL2
Bit 2
(1)
PTEN17
DWAITE1
DWAITE1
IRQM1
PTEN1
OB1E
Bit 1
ARPT1
CAL1
Bit 1
(1)
PTEN16
DWAITE0
DWAITE0
IRQM0
PTEN0
OB0E
Bit 0
ARPT0
CAL0
Bit 0
(1)
(Note 1)
Resets
Resets
0000
0000
0000
0000
0000
0200
0000
0000
0600
0000
xxxx
xxxx
xxxx
xxxx
008F
xxxx
0000
xxxx
All
All

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