IC DSPIC MCU/DSP 144K 64TQFP

 

DSPIC30F6012A-20E/PT

Manufacturer Part NumberDSPIC30F6012A-20E/PT
DescriptionIC DSPIC MCU/DSP 144K 64TQFP
ManufacturerMicrochip Technology
SeriesdsPIC™ 30F
DSPIC30F6012A-20E/PT datasheets

Availability: In stock

International delivery:

Warranty: 60 days

Shipping & payment terms

Added to cart

 

Specifications of DSPIC30F6012A-20E/PT

Program Memory TypeFLASHProgram Memory Size144KB (48K x 24)
Package / Case64-TFQFPCore ProcessordsPIC
Core Size16-BitSpeed20 MIPS
ConnectivityCAN, I²C, SPI, UART/USARTPeripheralsAC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
Number Of I /o52Eeprom Size4K x 8
Ram Size8K x 8Voltage - Supply (vcc/vdd)2.5 V ~ 5.5 V
Data ConvertersA/D 16x12bOscillator TypeInternal
Operating Temperature-40°C ~ 125°CProductDSCs
Data Bus Width16 bitProcessor SeriesDSPIC30F
CoredsPICMaximum Clock Frequency20 MHz
Number Of Programmable I/os52Data Ram Size8 KB
Maximum Operating Temperature+ 125 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011
Minimum Operating Temperature- 40 CPackage64TQFP
Device CoredsPICFamily NamedsPIC30
Maximum Speed20 MHzOperating Supply Voltage3.3|5 V
Interface TypeCAN/I2C/SPI/UARTOn-chip Adc16-chx12-bit
Number Of Timers5Lead Free Status / RoHS StatusLead free / RoHS Compliant
For Use WithAC30F008 - MODULE SKT FOR DSPIC30F 64TQFP  
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Page 51
52
Page 52
53
Page 53
54
Page 54
55
Page 55
56
Page 56
57
Page 57
58
Page 58
59
Page 59
60
Page 60
61
62
63
64
65
66
Page 52/66

Download datasheet (2Mb)Embed
PrevNext
11.12 Reading Data Memory
The procedure for reading data memory is similar to
that of reading code memory, except that 16-bit data
words are read instead of 24-bit words. Since less data
is read in each operation, only working registers
W0:W3 are used as temporary holding registers for the
data to be read.
TABLE 11-12: SERIAL INSTRUCTION EXECUTION FOR READING DATA MEMORY
Command
Data
(Binary)
(Hexadecimal)
Step 1: Exit the Reset vector.
0000
040100
GOTO 0x100
0000
040100
GOTO 0x100
0000
000000
NOP
Step 2: Initialize TBLPAG and the read pointer (W6) for TBLRD instruction.
0000
2007F0
MOV
0000
880190
MOV
0000
2xxxx6
MOV
Step 3: Initialize the write pointer (W7) and store the next four locations of code memory to W0:W5.
0000
EB0380
CLR
0000
000000
NOP
0000
BA1BB6
TBLRDL [W6++], [W7++]
0000
000000
NOP
0000
000000
NOP
0000
BA1BB6
TBLRDL [W6++], [W7++]
0000
000000
NOP
0000
000000
NOP
0000
BA1BB6
TBLRDL [W6++], [W7++]
0000
000000
NOP
0000
000000
NOP
0000
BA1BB6
TBLRDL [W6++], [W7++]
0000
000000
NOP
0000
000000
NOP
Step 4: Output W0:W5 using the VISI register and REGOUT command.
0000
883C20
MOV
0000
000000
NOP
0001
<VISI>
Clock out contents of VISI register
0000
000000
NOP
0000
883C21
MOV
0000
000000
NOP
0001
<VISI>
Clock out contents of VISI register
0000
000000
NOP
0000
883C22
MOV
0000
000000
NOP
0001
<VISI>
Clock out contents of VISI register
0000
000000
NOP
0000
883C23
MOV
0000
000000
NOP
0001
<VISI>
Clock out contents of VISI register
0000
000000
NOP
Step 5: Reset device internal PC.
0000
040100
GOTO 0x100
0000
000000
NOP
Step 6: Repeat steps 3-5 until all desired data memory is read.
DS70102K-page 52
Table 11-12
shows the ICSP programming details for
reading data memory. Note that the TBLPAG register is
hard-coded to 0x7F (the upper byte address of all
locations of data memory).
Description
#0x7F, W0
W0, TBLPAG
#<SourceAddress15:0>, W6
W7
W0, VISI
W1, VISI
W2, VISI
W3, VISI
© 2010 Microchip Technology Inc.