DSPIC30F6012-20E/PF Microchip Technology, DSPIC30F6012-20E/PF Datasheet - Page 7

• Manufacturer Part Number: DSPIC30F6012-20E/PF
• Description: IC DSPIC MCU/DSP 144K 64TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F6012-20E/PF

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 52
• Program Memory Size: 144KB (48K x 24)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 64-TQFP, 64-VQFP
• For Use With: XLT64PT4 - SOCKET TRAN ICE 64MQFP/TQFPAC164313 - MODULE SKT FOR PM3 64PFAC30F002 - MODULE SOCKET DSPIC30F 64TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: DSPIC30F601220EPF

5. Module: PSV Operations
TABLE 3:
EXAMPLE 2:
© 2010 Microchip Technology Inc.
ADDC
SUBB
SUBBR
CPB
RLC
RRC
ADD (Accumulator-based)
LAC
Note 1:
When one of the operands of instructions shown in
Table 3 is fetched from program memory using
Program Space Visibility (PSV), the STATUS
Register, SR and/or the results may be corrupted.
Work arounds
Work around 1: For Assembly Language
Source Code
To work around the erratum in the MPLAB ASM30
assembler, the application may perform a PSV
access to move the source operand from program
memory to RAM or a W register prior to performing
the operations listed in Table 3. The work around
for Example 2 is demonstrated in Example 3.
.include “p30fxxxx.inc”
.......
MOV.B
MOV.B
BSET
....
MOV
ADD
ADDC
2:
3:
4:
Refer to the “dsPIC30F/33F Programmer’s Reference Manual”, (DS70157), for details on the dsPIC30F
Instruction set.
The errata only affects these instructions when a PSV access is performed to fetch one of the source
operands in the instruction. A PSV access is performed when the Effective Address of the source operand
is greater than 0x8000 and the PSV bit (CORCON<2>) is set to ‘1’. In the examples shown, the data
access from program memory is made via the W1 register.
SR<1:0> bits represent Sticky Zero and Carry Status bits respectively.
SR<15:10> bits represent Accumulator Overflow and Saturation Status bits.
Instruction
#0x00, W0
WREG, PSVPAG
CORCON, #PSV;Enable PSV
#0x8200, W1 ;Set up W1 for
W3, [W1++], W5 ;This instruction
W4, [W1++], W6 ;Carry flag and
AFFECTED INSTRUCTIONS
INCORRECT RESULTS
(1)
;Load PSVPAG register
;indirect PSV access
;from 0x000200
;works ok
;W6 gets
;corrupted here!
ADDC W0, [W1++], W2 ;
SUBB.b W0, [++W1], W3 ;
SUBBR.b W0, [++W1], W3 ;
CPB W0, [W1++], W4 ;
RLC [W1], W4 ;
RRC [W1], W2 ;
ADD [W1++], A ;
LAC [W1], A ;
Examples of Incorrect Operation
dsPIC30F6011/6012/6013/6014
EXAMPLE 3:
These instructions are identified in Table 3.
Example 2 demonstrates a scenario where this
occurs.
Also, always use Work around 2 if the C compiler
is used to generate code for dsPIC30F6011/6012/
6013/6014 devices.
Work around 2: For C Language Source Code
For applications using C language, MPLAB C30
versions 1.20.04 or higher provide the following
command-line switch that implements a work
around for the erratum.
Refer to the “readme.txt” file in the MPLAB C30
v1.20.04 toolsuite for further details.
Affected Silicon Revisions
.include “p30fxxxx.inc”
.......
MOV.B
MOV.B
BSET
....
MOV
ADD
MOV
ADDC
A3
X
(2)
B1
X
-merrata=psv
#0x00, w0
WREG, PSVPAG
CORCON, #PSV;Enable PSV
#0x8200, W1 ;Set up W1 for
W3, [W1++], W5;This instruction
[W1++], W2 ;Load W2 with data
W4, W2, W6 ;Carry flag and W4
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<1:0> bits
SR<15:10> bits
B2
X
CORRECT RESULTS
Data Corruption IN
;Load PSVPAG register
;indirect PSV access
;from 0x000200
;from program memory
;results are ok!
(3)
(3)
(3)
(3)
(3)
(3)
(3)
, Result in W2
, Result in W3
, Result in W3
, Result in W4
, Result in W2
(4)
;works ok
DS80456D-page 7