LPC2103FHN48H/6,51 NXP Semiconductors, LPC2103FHN48H/6,51 Datasheet - Page 21

• Manufacturer Part Number: LPC2103FHN48H/6,51
• Description: IC ARM7 MCU FLASH 32K 48HVQFN
• Manufacturer: NXP Semiconductors
• Series: LPC2100r

Specifications of LPC2103FHN48H/6,51

• Program Memory Type: FLASH
• Program Memory Size: 32KB (32K x 8)
• Package / Case: 48-VQFN Exposed Pad, 48-HVQFN, 48-SQFN, 48-DHVQFN
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 70MHz
• Connectivity: I²C, Microwire, SPI, SSI, SSP, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC21
• Core: ARM7 TDMI
• Data Bus Width: 32 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 70 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, DB-LQFP48-LPC2103, MCB2103, MCB2103U, MCB2103UME, KSK-LPC2103-01, KSK-LPC2103-01PL, KSK-LPC2103-02
• Development Tools By Supplier: OM10079, OM10081, OM10090
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288984518

NXP Semiconductors
LPC2101_02_03_4
Product data sheet
6.18.1 EmbeddedICE
6.18.2 RealMonitor
Standard ARM EmbeddedICE logic provides on-chip debug support. The debugging of
the target system requires a host computer running the debugger software and an
EmbeddedICE protocol converter. The EmbeddedICE protocol converter converts the
remote debug protocol commands to the JTAG data needed to access the ARM core.
The ARM core has a debug communication channel function built-in. The debug
communication channel allows a program running on the target to communicate with the
host debugger or another separate host without stopping the program flow or even
entering the debug state. The debug communication channel is accessed as a
coprocessor 14 by the program running on the ARM7TDMI-S core. The debug
communication channel allows the JTAG port to be used for sending and receiving data
without affecting the normal program flow. The debug communication channel data and
control registers are mapped in to addresses in the EmbeddedICE logic. The JTAG clock
(TCK) must be slower than
RealMonitor is a configurable software module, developed by ARM Inc., which enables
real time debug. It is a lightweight debug monitor that runs in the background while users
debug their foreground application. It communicates with the host using the DCC, which is
present in the EmbeddedICE logic. The LPC2101/02/03 contain a specific configuration of
RealMonitor software programmed into the on-chip boot ROM memory.
Rev. 04 — 2 June 2009
1
6
of the CPU clock (CCLK) for the JTAG interface to operate.
Single-chip 16-bit/32-bit microcontrollers
LPC2101/02/03
© NXP B.V. 2009. All rights reserved.
21 of 37