Z8F0422SJ020EG Zilog, Z8F0422SJ020EG Datasheet - Page 75

IC ENCORE MCU FLASH 4K 28SOIC

Z8F0422SJ020EG

Manufacturer Part Number
Z8F0422SJ020EG
Description
IC ENCORE MCU FLASH 4K 28SOIC
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0422SJ020EG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
19
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 5x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SOIC (7.5mm Width)
Processor Series
Z8F042xx
Core
eZ8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
19
Number Of Timers
2
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 5 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
269-4142
Z8F0422SJ020EG
Table 26. Interrupt Request 1 Register (IRQ1)
PS022517-0508
BITS
FIELD
RESET
R/W
ADDR
Interrupt Request 1 Register
7
PA7I
U0RXI—UART 0 Receiver Interrupt Request
0 = No interrupt request is pending for the UART 0 receiver.
1 = An interrupt request from the UART 0 receiver is awaiting service.
U0TXI—UART 0 Transmitter Interrupt Request
0 = No interrupt request is pending for the UART 0 transmitter.
1 = An interrupt request from the UART 0 transmitter is awaiting service.
I 2 CI— I
0 = No interrupt request is pending for the I
1 = An interrupt request from the I
SPII—SPI Interrupt Request
0 = No interrupt request is pending for the SPI.
1 = An interrupt request from the SPI is awaiting service.
ADCI—ADC Interrupt Request
0 = No interrupt request is pending for the ADC.
1 = An interrupt request from the ADC is awaiting service.
The Interrupt Request 1 (IRQ1) Register
vectored and polled interrupts. When a request is presented to the interrupt controller, the
corresponding bit in the IRQ1 register becomes 1. If interrupts are globally enabled
(vectored interrupts), the interrupt controller passes an interrupt request to the eZ8 CPU.
If interrupts are globally disabled (polled interrupts), the eZ8 CPU reads the IRQ1
Register to determine if any interrupt requests are pending.
PAxI—Port A Pin x Interrupt Request
0 = No interrupt request is pending for GPIO Port A pin x.
1 = An interrupt request from GPIO Port A pin x is awaiting service.
Where x indicates the specific GPIO Port pin number (0 through 7).
6
2
PA6I
C Interrupt Request
5
PA5I
4
PA4I
2
C is awaiting service.
FC3H
R/W
(Table
0
3
2
C.
PA3I
26) stores interrupt requests for both
2
Z8 Encore! XP
PA2I
Product Specification
PA1I
1
®
Interrupt Controller
F0822 Series
PA0I
0
62

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