STM32F103VCT6TR STMicroelectronics, STM32F103VCT6TR Datasheet - Page 62

• Manufacturer Part Number: STM32F103VCT6TR
• Description: MCU 32BIT ARM 256K FLASH 100-LQF
• Manufacturer: STMicroelectronics
• Series: STM32r

Specifications of STM32F103VCT6TR

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 72MHz
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART, USB
• Peripherals: DMA, Motor Control PWM, PDR, POR, PVD, PWM, Temp Sensor, WDT
• Number Of I /o: 80
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 48K x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Processor Series: STM32F103x
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 48 KB
• Interface Type: CAN, I2C, SPI, USART
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 80
• Number Of Timers: 11
• Operating Supply Voltage: 2 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWARM, EWARM-BL, MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: 497-10030 - STARTER KIT FOR STM32497-8511 - KIT STARTER FOR STM32 512K FLASH497-6438 - BOARD EVALUTION FOR STM32 512K
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
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Figure 24. Asynchronous non-multiplexed SRAM/PSRAM/NOR read waveforms
1. Mode 2/B, C and D only. In Mode 1, FSMC_NADV is not used.
Table 31.
1. C
2. Based on characterization, not tested in production.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
w(NE)
v(NOE_NE)
w(NOE)
h(NE_NOE)
v(A_NE)
h(A_NOE)
v(BL_NE)
h(BL_NOE)
su(Data_NE)
su(Data_NOE)
h(Data_NOE)
h(Data_NE)
v(NADV_NE)
w(NADV)
Symbol
L
= 15 pF.
FSMC_NBL[1:0]
FSMC_NADV
FSMC_D[15:0]
FSMC_A[25:0]
FSMC_NWE
FSMC_NOE
FSMC_NE
Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings
FSMC_NE low time
FSMC_NEx low to FSMC_NOE low
FSMC_NOE low time
FSMC_NOE high to FSMC_NE high hold time –1.5
FSMC_NEx low to FSMC_A valid
Address hold time after FSMC_NOE high
FSMC_NEx low to FSMC_BL valid
FSMC_BL hold time after FSMC_NOE high
Data to FSMC_NEx high setup time
Data to FSMC_NOEx high setup time
Data hold time after FSMC_NOE high
Data hold time after FSMC_NEx high
FSMC_NEx low to FSMC_NADV low
FSMC_NADV low time
(1)
Parameter
Doc ID 14611 Rev 7
t
t
v(NOE_NE)
t
v(NADV_NE)
v(A_NE)
t
v(BL_NE)
t
w(NADV)
STM32F103xC, STM32F103xD, STM32F103xE
Address
t
w(NE)
t
w(NOE)
t
5T
0.5
5T
0.1
0
2T
2T
0
0
su(Data_NOE)
t
su(Data_NE)
HCLK
HCLK
HCLK
HCLK
t
Data
h(BL_NOE)
Min
t
h(A_NOE)
– 1.5
– 1.5
+ 25
+ 25
T
5T
1.5
5T
7
0
5
HCLK
t
HCLK
HCLK
h(NE_NOE)
t
h(Data_NOE)
Max
t
h(Data_NE)
+ 1.5
+ 2
+ 1.5
ai14991B
(1) (2)
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Unit